commit 551cff08d540ced6817cfe230750a311d573c209
author Vladimir Serbinenko <phcoder@gmail.com> Sat Oct 10 23:58:08 2015 +0200
committer Vladimir Serbinenko <phcoder@gmail.com> Sun Oct 11 10:07:12 2015 +0000
tree ed32fa211b291527ed275aa286faa2af49584f72
parent 68c70994e5c7c38c8fe3625477d3191d186b7e68

Derive lvds_dual_channel from EDID timings.

Based on the info by Felix Held.

Change-Id: Iab84dd8a0e3c942da20a6e21db5510e4ad16cadd
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/11857
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/northbridge/intel/nehalem/gma.c

diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c
index 9abbdea..ed993f1 100644
--- a/src/northbridge/intel/nehalem/gma.c
+++ b/src/northbridge/intel/nehalem/gma.c
@@ -722,7 +722,7 @@
 	hfront_porch = mode->hso;
 	vfront_porch = mode->vso;
 
-	target_frequency = info->gfx.lvds_dual_channel ? mode->pixel_clock
+	target_frequency = mode->lvds_dual_channel ? mode->pixel_clock
 		: (2 * mode->pixel_clock);
 	vga_textmode_init();
 #if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)
@@ -807,7 +807,7 @@
 	printk(BIOS_DEBUG, (info->gfx.use_spread_spectrum_clock
 			    ? "Spread spectrum clock\n" : "DREF clock\n"));
 	printk(BIOS_DEBUG,
-	       info->gfx.lvds_dual_channel ? "Dual channel\n" : "Single channel\n");
+	       mode->lvds_dual_channel ? "Dual channel\n" : "Single channel\n");
 	printk(BIOS_DEBUG, "Polarities %d, %d\n",
 	       hpolarity, vpolarity);
 	printk(BIOS_DEBUG, "Data M1=%d, N1=%d\n",
@@ -824,7 +824,7 @@
 
 	write32(mmio + PCH_LVDS,
 		(hpolarity << 20) | (vpolarity << 21)
-		| (info->gfx.lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL
+		| (mode->lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL
 		   | LVDS_CLOCK_BOTH_POWERUP_ALL : 0)
 		| LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL
 		| LVDS_DETECTED);
@@ -839,7 +839,7 @@
 		| ((pixel_m1 - 2) << 8) | pixel_m2);
 	write32(mmio + _PCH_DPLL(0),
 		DPLL_VCO_ENABLE | DPLLB_MODE_LVDS
-		| (info->gfx.lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7
+		| (mode->lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7
 		   : DPLLB_LVDS_P2_CLOCK_DIV_14)
 		| (0x10000 << (pixel_p1 - 1))
 		| ((info->gfx.use_spread_spectrum_clock ? 3 : 0) << 13)
@@ -847,7 +847,7 @@
 	mdelay(1);
 	write32(mmio + _PCH_DPLL(0),
 		DPLL_VCO_ENABLE | DPLLB_MODE_LVDS
-		| (info->gfx.lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7
+		| (mode->lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7
 		   : DPLLB_LVDS_P2_CLOCK_DIV_14)
 		| (0x10000 << (pixel_p1 - 1))
 		| ((info->gfx.use_spread_spectrum_clock ? 3 : 0) << 13)
@@ -858,7 +858,7 @@
 
 	write32(mmio + PCH_LVDS,
 		(hpolarity << 20) | (vpolarity << 21)
-		| (info->gfx.lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL
+		| (mode->lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL
 		   | LVDS_CLOCK_BOTH_POWERUP_ALL : 0)
 		| LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL
 		| LVDS_DETECTED);
@@ -955,7 +955,7 @@
 	write32(mmio + PCH_LVDS,
 		LVDS_PORT_ENABLE
 		| (hpolarity << 20) | (vpolarity << 21)
-		| (info->gfx.lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL
+		| (mode->lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL
 		   | LVDS_CLOCK_BOTH_POWERUP_ALL : 0)
 		| LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL
 		| LVDS_DETECTED);