soc/intel/apollolake: Make use of is_devfn_enabled() function
1. Replace all pcidev_path_on_root() and is_dev_enabled() functions
combination with is_devfn_enabled().
2. Remove unused local variable of device structure type
(struct device *).
3. Replace pcidev_path_on_root() and dev->enabled check with
is_devfn_enabled() call.
TEST=Able to build and boot without any regression seen on Reef.
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I900038dd4b2e2d89b1236bbd26bec5f34483b9f3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55327
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 7172231..9694c67 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -533,7 +533,6 @@
{
#if CONFIG(SOC_INTEL_GEMINILAKE)
uint8_t port;
- struct device *dev;
for (port = 0; port < APOLLOLAKE_USB2_PORT_MAX; port++) {
if (!cfg->usb2eye[port].Usb20OverrideEn)
@@ -549,8 +548,7 @@
cfg->usb2eye[port].Usb20IUsbTxEmphasisEn;
}
- dev = pcidev_path_on_root(SA_GLK_DEVFN_GMM);
- silconfig->Gmm = is_dev_enabled(dev);
+ silconfig->Gmm = is_devfn_enabled(SA_GLK_DEVFN_GMM);
/* On Geminilake, we need to override the default FSP PCIe de-emphasis
* settings using the device tree settings. This is because PCIe
@@ -693,8 +691,7 @@
/* Set VTD feature according to devicetree */
silconfig->VtdEnable = cfg->enable_vtd;
- dev = pcidev_path_on_root(SA_DEVFN_IGD);
- silconfig->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_dev_enabled(dev);
+ silconfig->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_devfn_enabled(SA_DEVFN_IGD);
silconfig->PavpEnable = CONFIG(PAVP);