tree 6bca911846f6837d8904c02536905e5d9d5fc726
parent e3bf8ba2d812dd027afa8ee8ff368a5295ce1bda
author Wonkyu Kim <wonkyu.kim@intel.com> 1586327831 -0700
committer Patrick Georgi <pgeorgi@google.com> 1586857953 +0000

mb/intel/tglrvp : Enable RP LTR

BUG=b:151166040
TEST= build and boot volteer and check LTR and AER value
from FSP log

Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: I8ab7667d788563ffcb9287a64254590ef9bea5d8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40269
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>