tree 26b7b42ba97288d14ff218c4b49d2fc741a22d21
parent db9873b69c52cc1eac5bfef72228f071e303a78f
author Uwe Poeche <uwe.poeche@siemens.com> 1648463941 +0200
committer Felix Held <felix-coreboot@felixheld.de> 1652872449 +0000

intel/common/block: Provide RAPL and min clock ratio switches in common

There are two APL specific config switches for RAPL and min. cpu clock
(APL_SKIP_SET_POWER_LIMITS, APL_SET_MIN_CLOCK_RATIO). These switches
could be used in future in other CPU platforms. Move them to common code
instead of having them just for one SOC.

Test: Make sure that the clock ratio (MSR 0x198) and the RAPL settings
(MSR0x610) do not change with this patch applied on mc_apl{1,4,5}
mainboard.

Change-Id: I3d63d1b9b6c96586a3c20bf8c1d8001b1d7c4bed
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>