tree 76474734208246a26f50e689c3053edef5c6c20d
parent d581878264fc9c5900c19d1a8b3b1851d1b695db
author Varshit Pandya <pandyavarshit@gmail.com> 1697477212 +0530
committer Felix Held <felix-coreboot@felixheld.de> 1698763222 +0000

soc/amd/genoa: Add PCI interrupt support

This patch adds PCI interrupt details as per the Processor Programming
Reference (PPR) version 0.25 (#55901), table 319.

Change-Id: I81251bd60aac1d7bd3181699d3adca315291f336
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78392
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>