mainboard/asus/kgpe-d16: Add initial support for the KGPE-D16

As of this commit S3 suspend does not work on any K10 boards,
including this board.

Change-Id: Idd3971422fb2473bff7c60fe8d8161d6e20808ed
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11946
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/mainboard/asus/kgpe-d16/bootblock.c b/src/mainboard/asus/kgpe-d16/bootblock.c
new file mode 100644
index 0000000..2e9d70f
--- /dev/null
+++ b/src/mainboard/asus/kgpe-d16/bootblock.c
@@ -0,0 +1,52 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <pc80/mc146818rtc.h>
+
+void bootblock_mainboard_init(void)
+{
+	uint8_t recovery_enabled;
+	unsigned char addr;
+	unsigned char byte;
+
+	bootblock_northbridge_init();
+	bootblock_southbridge_init();
+
+	/* Recovery jumper is connected to SP5100 GPIO61, and clears the GPIO when placed in the Recovery position */
+	recovery_enabled = (!(pci_read_config8(PCI_DEV(0, 0x14, 0), 0x57) & 0x1));
+	if (recovery_enabled) {
+#if CONFIG_USE_OPTION_TABLE
+		/* Clear NVRAM checksum */
+		for (addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++) {
+			cmos_write(0x0, addr);
+		}
+
+		/* Set fallback boot */
+		byte = cmos_read(RTC_BOOT_BYTE);
+		byte &= 0xfc;
+		cmos_write(byte, RTC_BOOT_BYTE);
+#else
+		/* FIXME
+		 * Figure out how to recover if the option table is not available
+		 */
+#endif
+	}
+}
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