tree d7345f8fcb0d1f857affd2d5dc310ed2715bdd29
parent 5787a4c53b56325dad364f11774b481fc27a9684
author Xiang Wang <wxjstz@126.com> 1561093450 +0800
committer Martin L Roth <gaumless@gmail.com> 1710027265 +0000

arch/riscv: Add SMP support for exception handler

Change-Id: Ia1f97b82e329f6358061072f98278cf56b503618
Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68841
Reviewed-by: Philipp Hug <philipp@hug.cx>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>