linking: Repair special treatments for non-x86 bootblocks
Patch b2a62622b (linking: move romstage and bootblock to use program.ld)
unified the linker scripts between different stages. Unfortunately it
omitted several special cases from the old bootblock.ld script that are
required for non-x86 environments.
This patch expands program.ld to once again merge the .BSS into the
program image for bootblocks (ensuring correct initialization by the
external loader). It also revives the .id section (which adds a
human-readable blurb of information to the top of an image) and fixes a
problem with unintended automated section alignment.
BRANCH=None
BUG=None
TEST=Jerry and Oak boot again.
Change-Id: I54271b8b59a9c773d858d676cde0218cb7f20e74
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6fddbc00963e363039634fa31a9b66254b6cf18f
Original-Change-Id: I4d748056f1ab29a8e730f861879982bdf4c33eab
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/299413
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11660
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
diff --git a/src/lib/program.ld b/src/lib/program.ld
index 9f28d65..c8ce5ee 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -23,8 +23,11 @@
/* First we place the code and read only data (typically const declared).
* This could theoretically be placed in rom.
+ * The '.' in '.text . : {' is actually significant to prevent missing some
+ * SoC's entry points due to artificial alignment restrictions, see
+ * https://sourceware.org/binutils/docs/ld/Output-Section-Address.html
*/
-.text : {
+.text . : {
_program = .;
_text = .;
/*
@@ -35,6 +38,7 @@
*(.rom.data);
*(.text._start);
*(.text.stage_entry);
+ KEEP(*(.id));
*(.text);
*(.text.*);
@@ -64,7 +68,7 @@
} : to_load
#if ENV_RAMSTAGE && IS_ENABLED(CONFIG_COVERAGE)
-.ctors : {
+.ctors . : {
. = ALIGN(0x100)
__CTOR_LIST__ = .;
KEEP(*(.ctors));
@@ -76,7 +80,7 @@
/* Include data, bss, and heap in that order. Not defined for all stages. */
#if ARCH_STAGE_HAS_DATA_SECTION
-.data : {
+.data . : {
. = ALIGN(ARCH_CACHELINE_ALIGN_SIZE);
_data = .;
@@ -107,7 +111,14 @@
#endif
#if ARCH_STAGE_HAS_BSS_SECTION
-.bss : {
+#if ENV_BOOTBLOCK
+/* Bootblocks are not CBFS stages, so they cannot communicate the amount of
+ * (memsz - filesz) bytes the loader needs to clear for them. Therefore we merge
+ * the BSS into the .data section so those zeroes get loaded explicitly. */
+.data . : {
+#else
+.bss . : {
+#endif
. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_bss = .;
*(.bss)
@@ -120,7 +131,7 @@
#endif
#if ARCH_STAGE_HAS_HEAP_SECTION
-.heap : {
+.heap . : {
. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_heap = .;
. += (ENV_RMODULE ? __heap_size : CONFIG_HEAP_SIZE);