soc/intel/common: Update CSE sub partition update

The patch adds support in the CSE Sub partition update procedure
to use GET_BOOT_PARTITION_INFO HECI command output to create the
region device for CSE RO and CSE RW. The GET_BOOT_PARTITION_INFO
HECI command provides CSE's RO and RW boot partition information.

Existing code relies on FMD file to get the CSE's boot partition's
(CSE RO and CSE RW) start and size details. This change make
independent of FMD file declaration with respect to CSE RO and CSE RW.

TEST=Build and verify the CSE RO and CSE RW region device information
through code instrumentation. Also, did boot test on Kano system.

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Ie9a83b77ab44ea6ffe5bb20673e109a89a148629
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index 2756814..ca6d7d3 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -127,6 +127,7 @@
 	struct cse_bp_info bp_info;
 } __packed;
 
+static const char * const cse_regions[] = {"RO", "RW"};
 
 bool cse_get_boot_performance_data(struct cse_boot_perf_rsp *boot_perf_rsp)
 {
@@ -779,16 +780,43 @@
 	}
 }
 
-static bool cse_sub_part_get_target_rdev(struct region_device *target_rdev,
-				const char *region_name, enum bpdt_entry_type type)
+static bool cse_locate_area_as_rdev_rw(const struct cse_bp_info *cse_bp_info,
+		size_t bp, struct region_device  *cse_rdev)
+{
+	struct region_device cse_region_rdev;
+	uint32_t size;
+	uint32_t start_offset;
+	uint32_t end_offset;
+
+	if (!cse_get_rw_rdev(&cse_region_rdev))
+		return false;
+
+	if (!strcmp(cse_regions[bp], "RO"))
+		cse_get_bp_entry_range(cse_bp_info, RO, &start_offset, &end_offset);
+	else
+		cse_get_bp_entry_range(cse_bp_info, RW, &start_offset, &end_offset);
+
+	size = end_offset + 1 - start_offset;
+
+	if (rdev_chain(cse_rdev, &cse_region_rdev, start_offset, size))
+		return false;
+
+	printk(BIOS_DEBUG, "cse_lite: CSE %s  partition: offset = 0x%x, size = 0x%x\n",
+			cse_regions[bp], start_offset, size);
+	return true;
+}
+
+static bool cse_sub_part_get_target_rdev(const struct cse_bp_info *cse_bp_info,
+	struct region_device *target_rdev, size_t bp, enum bpdt_entry_type type)
 {
 	struct bpdt_header bpdt_hdr;
 	struct region_device cse_rdev;
 	struct bpdt_entry bpdt_entries[MAX_SUBPARTS];
 	uint8_t i;
 
-	if (fmap_locate_area_as_rdev_rw(region_name, &cse_rdev) < 0) {
-		printk(BIOS_ERR, "cse_lite: Failed to locate %s in the FMAP\n", region_name);
+	if (!cse_locate_area_as_rdev_rw(cse_bp_info, bp, &cse_rdev)) {
+		printk(BIOS_ERR, "cse_lite: Failed to locate %s in the CSE Region\n",
+				cse_regions[bp]);
 		return false;
 	}
 
@@ -925,7 +953,6 @@
 	struct fw_version target_fw_ver, source_fw_ver;
 	enum csme_failure_reason rv;
 	size_t size;
-	static const char * const cse_regions[] = {"CSE_RO", "CSE_RW"};
 
 	void *subpart_cbfs_rw = cbfs_map(name, &size);
 	if (!subpart_cbfs_rw) {
@@ -941,7 +968,7 @@
 
 	/* Trigger sub-partition update in CSE RO and CSE RW */
 	for (size_t bp = 0; bp < ARRAY_SIZE(cse_regions); bp++) {
-		if (!cse_sub_part_get_target_rdev(&target_rdev, cse_regions[bp], type)) {
+		if (!cse_sub_part_get_target_rdev(cse_bp_info, &target_rdev, bp, type)) {
 			rv = CSE_LITE_SKU_SUB_PART_ACCESS_ERR;
 			goto error_exit;
 		}