| commit | 7458ade42e282d731e4005fa124505aec8327630 | [log] [tgz] |
|---|---|---|
| author | Jon Murphy <jpmurphy@google.com> | Thu Sep 29 17:04:48 2022 +0000 |
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | Sun Oct 02 22:06:47 2022 +0000 |
| tree | 16c9bb56d24c16923ea04a640285616bd12abebf | |
| parent | 7af2b65e67412bc6089244302e599699d84b16ac [diff] |
Update blobs submodule to upstream master
Updating from commit id d55c315:
2022-07-05 14:51:39 +0000 - (mb/starlabs: Remove padding from logo)
to commit id 5a19332:
2022-09-28 20:00:40 +0000 - (mb/google/skyrim: Add SPL Table for
ChromeOS)
This brings in 10 new commits:
5a19332 mb/google/skyrim: Add SPL Table for ChromeOS
a543a27 soc/mediatek/mt8188: Update MCUPM firmware from v1.01.01
to v1.01.02
9a76f55 soc/mediatek/mt8188: Update MCUPM firmware to v1.01.01
835f951 mb/google/skyrim: Add initial APCB release for skyrim board
4635ce0 soc/mediatek/mt8188: Add dram.elf version 0.1.0 for DRAM
calibration
05afca2 soc/mediatek/mt8188: Add SPM firmware
3324df4 soc/mediatek/mt8188: Add dpm.pm and dpm.dm version 0.1
10a740e soc/mediatek/mt8188: Add SSPM firmware v1.88.00
db990c6 soc/mediatek/mt8188: Add MCUPM firmware v1.01.00
c5a4fda soc/mediatek/mt8188: Add MT8188 basic files
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: Idac3c5eb7ad1eb586ca5a33c7f46e16c762948d3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67986
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.