mb/*: Add consolidated USB port config for SNB+MRC boards
For each sandybridge boards with option to use MRC or native platform
init code, add a copy of the board's USB port config, consolidated between
both code paths, into the southbridge devicetree, using special values
allocated for this consolidation.
These get hooked up in a separate patch.
Change-Id: I53efca3d29b3c5d4d5b7e3d6dc3e6ce6c34201e6
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81880
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb
index a035628..d17d3735 100644
--- a/src/mainboard/kontron/ktqm77/devicetree.cb
+++ b/src/mainboard/kontron/ktqm77/devicetree.cb
@@ -55,6 +55,22 @@
register "xhci_switchable_ports" = "0x0f"
register "superspeed_capable_ports" = "0x0f"
+ register "usb_port_config" = "{
+ { 1, 0, 0 }, /* P0: lower left USB 3.0 (OC0) */
+ { 1, 0, 0 }, /* P1: upper left USB 3.0 (OC0) */
+ { 1, 0, 0 }, /* P2: lower right USB 3.0 (OC0) */
+ { 1, 0, 0 }, /* P3: upper right USB 3.0 (OC0) */
+ { 1, 0, 0 }, /* P4: lower USB 2.0 (OC0) */
+ { 1, 0, 0 }, /* P5: upper USB 2.0 (OC0) */
+ { 1, 0, 0 }, /* P6: front panel USB 2.0 (OC0) */
+ { 1, 0, 0 }, /* P7: front panel USB 2.0 (OC0) */
+ { 1, 0, 4 }, /* P8: internal USB 2.0 (OC4) */
+ { 1, 0, 4 }, /* P9: internal USB 2.0 (OC4) */
+ { 1, 0, 4 }, /* P10: internal USB 2.0 (OC4) */
+ { 1, 0, 4 }, /* P11: internal USB 2.0 (OC4) */
+ { 1, 0, 4 }, /* P12: internal USB 2.0 (OC4) */
+ { 1, 0, 4 }, /* P13: internal USB 2.0 (OC4) */
+ }"
device ref xhci on end # USB 3.0 Controller
device ref mei1 on end # Management Engine Interface 1