commit 5196642870df642102699613642d412561f6609d
author Aamir Bohra <aamir.bohra@intel.com> Thu May 11 20:31:06 2017 +0530
committer Aaron Durbin <adurbin@chromium.org> Mon May 22 18:12:05 2017 +0200
tree 912f418f59c98c344205dda6716ebd6787f8f732
parent 2d689f9e0d281b7ebe99340731511b51d9af21cc

soc/intel/skylake: Use Intel PCIe common code

Change-Id: Ia9fa22c30fffb1907320667ac37f55db9f3cb7b3
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>

src/soc/intel/skylake/Kconfig

diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 2bfa61c..e7cca32 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -56,6 +56,7 @@
 	select SOC_INTEL_COMMON_BLOCK_ITSS
 	select SOC_INTEL_COMMON_BLOCK_I2C
 	select SOC_INTEL_COMMON_BLOCK_LPSS
+	select SOC_INTEL_COMMON_BLOCK_PCIE
 	select SOC_INTEL_COMMON_BLOCK_PCR
 	select SOC_INTEL_COMMON_BLOCK_RTC
 	select SOC_INTEL_COMMON_BLOCK_SA