commit 51401c30509d189d07a8a94958bdecdfd8b7667d
author Elyes HAOUAS <ehaouas@noos.fr> Wed May 15 21:09:30 2019 +0200
committer Patrick Georgi <pgeorgi@google.com> Wed May 29 20:28:27 2019 +0000
tree 97f7829ad4d84e19a069f93be56b369abb933e8d
parent 5fd93e05820d742fac5dbc1b371b464a88bb9043

src/northbridge: Add missing 'include <types.h>'

<types.h> is supposed to provide <stdint.h> and <stddef.h>.
When <types.h> is included, <stdint.h> and/or <stddef.h> is removed.

Change-Id: Iad5367bed844b866b2ad87639eee29a16d9a99ed
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32808
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>

src/northbridge/intel/nehalem/raminit.c

diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 5b6077f..15d6abb 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -30,18 +30,18 @@
 #include <device/device.h>
 #include <halt.h>
 #include <spd.h>
-#include "raminit.h"
-#include "chip.h"
 #include <timestamp.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/intel/speedstep.h>
 #include <cpu/intel/turbo.h>
 #include <mrc_cache.h>
-
-#include "nehalem.h"
-
 #include <southbridge/intel/ibexpeak/me.h>
 #include <delay.h>
+#include <types.h>
+
+#include "chip.h"
+#include "nehalem.h"
+#include "raminit.h"
 
 #define NORTHBRIDGE PCI_DEV(0, 0, 0)
 #define SOUTHBRIDGE PCI_DEV(0, 0x1f, 0)