commit | 50863daef8ed75c0cb3dfd375e7622c898de5821 | [log] [tgz] |
---|---|---|
author | Martin Roth <martin@coreboot.org> | Fri Oct 01 14:37:30 2021 -0600 |
committer | Martin Roth <martinroth@google.com> | Tue Oct 05 18:06:52 2021 +0000 |
tree | cbb2dea518524f8c9ce5edca5d57132ca9705086 | |
parent | 0949e739066c3509e05db2b9ed71cefaaa62205f [diff] [blame] |
src/mainboard to src/security: Fix spelling errors These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58081 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/mainboard/portwell/m107/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex b/src/mainboard/portwell/m107/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex index c3b71d6..2a03e04 100644 --- a/src/mainboard/portwell/m107/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex +++ b/src/mainboard/portwell/m107/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex
@@ -38,7 +38,7 @@ # 4 SDRAM CHIP Density and Banks # bits[3:0]: 4 = 4 Gigabits Total SDRAM capacity per chip # bits[6:4]: 0 = 3 (8 banks) -# bits[7]: reserverd +# bits[7]: reserved 04 # 5 SDRAM Addressing