src/mainboard to src/security: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/mainboard/intel/dcp847ske/devicetree.cb b/src/mainboard/intel/dcp847ske/devicetree.cb
index 389b44e..f7821d0 100644
--- a/src/mainboard/intel/dcp847ske/devicetree.cb
+++ b/src/mainboard/intel/dcp847ske/devicetree.cb
@@ -81,7 +81,7 @@
device pnp 4e.609 off end # GPIO6
device pnp 4e.709 off end # GPIO7
device pnp 4e.a on end # ACPI
- device pnp 4e.b on # HWM, front pannel LED
+ device pnp 4e.b on # HWM, front panel LED
io 0x60 = 0xa30
io 0x62 = 0 # unused
end
diff --git a/src/mainboard/intel/dg41wv/devicetree.cb b/src/mainboard/intel/dg41wv/devicetree.cb
index 9b1aeb0..5f945c1 100644
--- a/src/mainboard/intel/dg41wv/devicetree.cb
+++ b/src/mainboard/intel/dg41wv/devicetree.cb
@@ -129,7 +129,7 @@
irq 0xe4 = 0x10 # Power dram during s3
irq 0xe6 = 0x8c
end
- device pnp 2e.b on # HWM, front pannel LED
+ device pnp 2e.b on # HWM, front panel LED
io 0x60 = 0xa00
irq 0x70 = 0
end
diff --git a/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl
index 26108a2..0d1158d 100644
--- a/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl
+++ b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl
@@ -108,7 +108,7 @@
* AX1V: Auxiliary LDO1 VR voltage value
* AX2V: Auxiliary LDO2 VR voltage value
* ACVA: Analog LDO VR voltage
- * DCVA: Core buck VR volatage
+ * DCVA: Core buck VR voltage
*/
OperationRegion (PWR2, 0xB1, Zero, 0x0100)
Field (PWR2, DWordAcc, NoLock, Preserve)
@@ -613,7 +613,7 @@
* AX1V: Auxiliary LDO1 VR voltage value
* AX2V: Auxiliary LDO2 VR voltage value
* ACVA: Analog LDO VR voltage
- * DCVA: Core buck VR volatage
+ * DCVA: Core buck VR voltage
*/
OperationRegion (PWR2, 0xB1, Zero, 0x0100)
Field (PWR2, DWordAcc, NoLock, Preserve)