commit 50863daef8ed75c0cb3dfd375e7622c898de5821
author Martin Roth <martin@coreboot.org> Fri Oct 01 14:37:30 2021 -0600
committer Martin Roth <martinroth@google.com> Tue Oct 05 18:06:52 2021 +0000
tree cbb2dea518524f8c9ce5edca5d57132ca9705086
parent 0949e739066c3509e05db2b9ed71cefaaa62205f

src/mainboard to src/security: Fix spelling errors

These issues were found and fixed by codespell, a useful tool for
finding spelling errors.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/facebook/fbg1701/ramstage.c

diff --git a/src/mainboard/facebook/fbg1701/ramstage.c b/src/mainboard/facebook/fbg1701/ramstage.c
index be99573..cdd34a4 100644
--- a/src/mainboard/facebook/fbg1701/ramstage.c
+++ b/src/mainboard/facebook/fbg1701/ramstage.c
@@ -181,7 +181,7 @@
 	{6, 0x68, {0x41, 0xC0, 0x30, 0x00, 0x00, 0x00} },
 	{6, 0x68, {0x10, 0x14, 0x03, 0x00, 0x00, 0x00} },
 	{6, 0x68, {0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF} },
-	/* Additional Settng for eDP */
+	/* Additional Setting for eDP */
 	{3, 0x68, {0x80, 0x03, 0x41, 0x00, 0x00, 0x00} },
 	{3, 0x68, {0xB4, 0x00, 0x0D, 0x00, 0x00, 0x00} },
 	/* DPRX CAD Register Setting */