mb/google/brya/var/vell: Enable SaGv
Enable SaGv support for vell
BUG=b:208719081
TEST=FW_NAME=vell emerge-brya coreboot
Change-Id: I01e3da449e2cf53278f625ca265d09f7a1869ef7
Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
diff --git a/src/mainboard/google/brya/variants/vell/memory.c b/src/mainboard/google/brya/variants/vell/memory.c
index afbe114..01e0afd 100644
--- a/src/mainboard/google/brya/variants/vell/memory.c
+++ b/src/mainboard/google/brya/variants/vell/memory.c
@@ -65,7 +65,8 @@
.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
},
- .ect = true, /* Enable Early Command Training */
+ .ect = false, /* Early Command Training */
+ .UserBd = BOARD_TYPE_ULT_ULX_T4,
.lp5x_config = {
.ccc_config = 0xff,
diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb
index fff53b6..fe929b5 100644
--- a/src/mainboard/google/brya/variants/vell/overridetree.cb
+++ b/src/mainboard/google/brya/variants/vell/overridetree.cb
@@ -32,6 +32,7 @@
register "gpio_pm[COMM_3]" = "0"
register "gpio_pm[COMM_4]" = "0"
register "gpio_pm[COMM_5]" = "0"
+ register "SaGv" = "SaGv_Enabled"
# Intel Common SoC Config
#+-------------------+---------------------------+