commit 501b71e7bb1370bbd079169dae0cf3d779fc4276
author Elyes Haouas <ehaouas@noos.fr> Tue Oct 11 13:15:37 2022 +0200
committer Felix Held <felix-coreboot@felixheld.de> Wed Oct 12 14:17:05 2022 +0000
tree 141a4667ac7fe10226008d7641a743950d7cd1f6
parent 7008085fd17040d74647fbef0dc638922e2c710f

treewide: Use 'fadt->pm_tmr_len' for 'x_pm_tmr_blk.bit_width'

Change-Id: Id4e2939b74ec93f50a4bedd0069090f0775b0556
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/southbridge/intel/i82801dx/fadt.c

diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c
index 3445469..12cbf55 100644
--- a/src/southbridge/intel/i82801dx/fadt.c
+++ b/src/southbridge/intel/i82801dx/fadt.c
@@ -65,7 +65,7 @@
 	fadt->x_pm1a_cnt_blk.addrh = 0x0;
 
 	fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->x_pm_tmr_blk.bit_width = 32;
+	fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8;
 	fadt->x_pm_tmr_blk.bit_offset = 0;
 	fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_UNDEFINED;
 	fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;