| # This file is part of the coreboot project. |
| # |
| # Copyright (C) 2018 Jonathan Neuschäfer |
| # |
| # This program is free software; you can redistribute it and/or modify |
| # it under the terms of the GNU General Public License as published by |
| # the Free Software Foundation; version 2 of the License. |
| # |
| # This program is distributed in the hope that it will be useful, |
| # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| # GNU General Public License for more details. |
| |
| config SOC_SIFIVE_FU540 |
| bool |
| select ARCH_RISCV |
| select ARCH_BOOTBLOCK_RISCV |
| select ARCH_VERSTAGE_RISCV |
| select ARCH_ROMSTAGE_RISCV |
| select ARCH_RAMSTAGE_RISCV |
| select BOOTBLOCK_CONSOLE |
| select DRIVERS_UART_SIFIVE |
| |
| if SOC_SIFIVE_FU540 |
| |
| endif |