mb/google/rex: Add fmd for debug FSP
Debug FSP is ~920KiB larger than release FSP and we don't have
sufficient space for rex flash layout.
Remove RW_LEGACY and split them into RW_SECTION_A/B so we can have a
room for it.
Note: This fmd will only used for internal testing/debugging and not for
the firmware in released devices.
BUG=b:262868089
TEST=Build google/rex with CONFIG_BUILDING_WITH_DEBUG_FSP.
Change-Id: I58b0af9c43c5d096dc80084497b39f13f67c25cd
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74140
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig
index 9d8a7cd..1a052a6 100644
--- a/src/mainboard/google/rex/Kconfig
+++ b/src/mainboard/google/rex/Kconfig
@@ -65,6 +65,11 @@
config DEVICETREE
default "variants/baseboard/\$(CONFIG_BASEBOARD_DIR)/devicetree.cb"
+config FMDFILE
+ default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos-debug-fsp.fmd" if CHROMEOS && BUILDING_WITH_DEBUG_FSP
+ default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
+
+
config MAINBOARD_DIR
default "google/rex"
diff --git a/src/mainboard/google/rex/chromeos-debug-fsp.fmd b/src/mainboard/google/rex/chromeos-debug-fsp.fmd
new file mode 100644
index 0000000..e57b4dd
--- /dev/null
+++ b/src/mainboard/google/rex/chromeos-debug-fsp.fmd
@@ -0,0 +1,54 @@
+FLASH 32M {
+ SI_ALL 9M {
+ SI_DESC 16K
+ SI_ME
+ }
+ SI_BIOS 23M {
+ RW_SECTION_A 7M {
+ VBLOCK_A 64K
+ FW_MAIN_A(CBFS)
+ RW_FWID_A 64
+ ME_RW_A(CBFS) 3008K
+ }
+ RW_MISC 1M {
+ UNIFIED_MRC_CACHE(PRESERVE) 128K {
+ RECOVERY_MRC_CACHE 64K
+ RW_MRC_CACHE 64K
+ }
+ RW_ELOG(PRESERVE) 16K
+ RW_SHARED 16K {
+ SHARED_DATA 8K
+ VBLOCK_DEV 8K
+ }
+ # The RW_SPD_CACHE region is only used for rex variants that use DDRx memory.
+ # It is placed in the common `chromeos.fmd` file because it is only 4K and there
+ # is free space in the RW_MISC region that cannot be easily reclaimed because
+ # the RW_SECTION_B must start on the 16M boundary.
+ RW_SPD_CACHE(PRESERVE) 4K
+ RW_VPD(PRESERVE) 8K
+ RW_NVRAM(PRESERVE) 24K
+ }
+ # This section starts at the 16M boundary in SPI flash.
+ # MTL does not support a region crossing this boundary,
+ # because the SPI flash is memory-mapped into two non-
+ # contiguous windows.
+ RW_SECTION_B 7M {
+ VBLOCK_B 64K
+ FW_MAIN_B(CBFS)
+ RW_FWID_B 64
+ ME_RW_B(CBFS) 3008K
+ }
+ # Make WP_RO region align with SPI vendor
+ # memory protected range specification.
+ WP_RO 8M {
+ RO_VPD(PRESERVE) 16K
+ RO_GSCVD 8K
+ RO_SECTION {
+ FMAP 2K
+ RO_FRID 64
+ GBB@4K 12K
+ COREBOOT(CBFS)
+ }
+ }
+ }
+}