fox_wtm2: First step support for coreboot-based graphics startup
This code is the initial version of FUI for haswell and wtm2.
The code is simplified from before in many ways. I've gotten rid of
the opcode table, because it obscured meaning and I don't think it is
needed any more. Register sets, mainly used for reset, are just lines
of code -- not many of them. There are a bunch of not-yet-documented
registers here; the VBIOS seemed to think they were necessary and
testing shows they seem to be right.
As a bit of added paranoia, we always include the VBIOS code as our
emergency recovery path. You have to run it now anyways, so this is no
regression from our current situation; and, if all goes well, in a
week (or so), you'll never have to run it again, but like the Force
and nose hair, it will be with you always.
The code can return in three ways. The first, best way is success:
panel is up and the VBIOS need not run. The second mode is that we
tried to light up the panel but could not, for some reason, but will
return with the panel partly up. In this case, it's ok not to power
cycle the panel. The third, worst case, which will NEVER happen, ha
ha, is that we have to turn the panel off and wait the required 600ms
for it to cycle. Life sucks sometimes. This failure mode is in the
'hang on we're going to fix it' category now that we have ramstage in
RW.
The Big Goal here is to create something other coreboot ports can use
as well. The guys doing the x60 report that the link FUI works,
without too many mods, on that chipset, so it seems Intel is keeping
things from changing too much over time.
Also, again, please note: this and the next 3 versions will ALWAYS fail.
The goal is to verify the correctness of the recovery path.
The bizarre tab-space formatting in drm_dp_helper.h is from the original,
as in i915_reg.h
Change-Id: I6ecf454633029d185c29d470980b5a0f3114a8ce
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3635
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
diff --git a/src/mainboard/intel/wtm2/Makefile.inc b/src/mainboard/intel/wtm2/Makefile.inc
index 516734b..a4afb7e 100644
--- a/src/mainboard/intel/wtm2/Makefile.inc
+++ b/src/mainboard/intel/wtm2/Makefile.inc
@@ -20,7 +20,7 @@
romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += i915.c
-ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += i915io.c
+ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += graphics.c
ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += intel_dp.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
diff --git a/src/mainboard/intel/wtm2/graphics.c b/src/mainboard/intel/wtm2/graphics.c
new file mode 100644
index 0000000..79820b9
--- /dev/null
+++ b/src/mainboard/intel/wtm2/graphics.c
@@ -0,0 +1,89 @@
+/*
+* This file is part of the coreboot project.
+*
+* Copyright 2013 Google Inc.
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; version 2 of the License.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+/* this file was for the most part machine generated, and in future
+ * will be all machine generated. Avoid editing.
+ */
+#include <console/console.h>
+#include "i915io.h"
+
+void graphics_register_reset(u32 aux_ctl, u32 aux_data, int verbose)
+{
+
+ io_i915_write32(0x80000000,0x45400);
+ io_i915_write32(0x00000000,_CURACNTR);
+ io_i915_write32((/* PIPEA */0x0<<24)|0x00000000,_DSPACNTR);
+ io_i915_write32(0x00000000,_DSPBCNTR);
+ io_i915_write32(0x80000000,CPU_VGACNTRL);
+ io_i915_write32(0x00000000,_DSPASIZE+0xc);
+ io_i915_write32(0x00000000,_DSPBSURF);
+ io_i915_write32(0x00000000,0x4f050);
+ io_i915_write32( DP_LINK_TRAIN_PAT_1 | DP_LINK_TRAIN_PAT_1_CPT |
+ DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0 | DP_PORT_WIDTH_1 |
+ DP_PLL_FREQ_270MHZ | DP_SCRAMBLING_DISABLE_IRONLAKE |
+ DP_SYNC_VS_HIGH |0x00000091,DP_A);
+ io_i915_write32(0x00200090,_FDI_RXA_MISC);
+ io_i915_write32(0x0a000000,_FDI_RXA_MISC);
+ /* not yet documented anywhere that we can find. */
+ io_i915_write32(0x00000070,0x46408);
+ io_i915_write32(0x04000000,0x42090);
+ io_i915_write32(0x40000000,0x4f050);
+ io_i915_write32(0x00000000,0x9840);
+ io_i915_write32(0xa4000000,0x42090);
+ io_i915_write32(0x00004000,0x42080);
+ io_i915_write32(0x00ffffff,0x64f80);
+ io_i915_write32(0x0007000e,0x64f84);
+ io_i915_write32(0x00d75fff,0x64f88);
+ io_i915_write32(0x000f000a,0x64f8c);
+ io_i915_write32(0x00c30fff,0x64f90);
+ io_i915_write32(0x00060006,0x64f94);
+ io_i915_write32(0x00aaafff,0x64f98);
+ io_i915_write32(0x001e0000,0x64f9c);
+ io_i915_write32(0x00ffffff,0x64fa0);
+ io_i915_write32(0x000f000a,0x64fa4);
+ io_i915_write32(0x00d75fff,0x64fa8);
+ io_i915_write32(0x00160004,0x64fac);
+ io_i915_write32(0x00c30fff,0x64fb0);
+ io_i915_write32(0x001e0000,0x64fb4);
+ io_i915_write32(0x00ffffff,0x64fb8);
+ io_i915_write32(0x00060006,0x64fbc);
+ io_i915_write32(0x00d75fff,0x64fc0);
+ io_i915_write32(0x001e0000,0x64fc4);
+ io_i915_write32(0x00ffffff,0x64e00);
+ io_i915_write32(0x0006000e,0x64e04);
+ io_i915_write32(0x00d75fff,0x64e08);
+ io_i915_write32(0x0005000a,0x64e0c);
+ io_i915_write32(0x00c30fff,0x64e10);
+ io_i915_write32(0x00040006,0x64e14);
+ io_i915_write32(0x80aaafff,0x64e18);
+ io_i915_write32(0x000b0000,0x64e1c);
+ io_i915_write32(0x00ffffff,0x64e20);
+ io_i915_write32(0x0005000a,0x64e24);
+ io_i915_write32(0x00d75fff,0x64e28);
+ io_i915_write32(0x000c0004,0x64e2c);
+ io_i915_write32(0x80c30fff,0x64e30);
+ io_i915_write32(0x000b0000,0x64e34);
+ io_i915_write32(0x00ffffff,0x64e38);
+ io_i915_write32(0x00040006,0x64e3c);
+ io_i915_write32(0x80d75fff,0x64e40);
+ io_i915_write32(0x000b0000,0x64e44);
+ /* end not yet documented. */
+ io_i915_write32(0x10000000,SDEISR+0x30);
+}
+
+
diff --git a/src/mainboard/intel/wtm2/i915.c b/src/mainboard/intel/wtm2/i915.c
index 41c8b15..8103016 100644
--- a/src/mainboard/intel/wtm2/i915.c
+++ b/src/mainboard/intel/wtm2/i915.c
@@ -30,7 +30,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
#include <arch/interrupt.h>
-#include <arch/coreboot_tables.h>
+#include <boot/coreboot_tables.h>
#include "hda_verb.h"
#include <smbios.h>
#include <device/pci.h>
@@ -40,15 +40,10 @@
#include <cpu/x86/tsc.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
-#include <cpu/amd/mtrr.h>
#include <cpu/x86/msr.h>
#include <edid.h>
#include "i915io.h"
-enum {
- vmsg = 1, vio = 2, vspin = 4,
-};
-
static int verbose = 0;
static unsigned int *mmio;
@@ -57,7 +52,6 @@
static unsigned short dataport;
static unsigned int physbase;
extern int oprom_is_loaded;
-static u32 htotal, hblank, hsync, vtotal, vblank, vsync;
const u32 link_edid_data[] = {
0xffffff00, 0x00ffffff, 0x0379e430, 0x00000000,
@@ -70,8 +64,7 @@
0x31504c00, 0x45513932, 0x50532d31, 0x24003141,
};
-#define READ32(addr) io_i915_READ32(addr)
-#define WRITE32(val, addr) io_i915_WRITE32(val, addr)
+static int ioread = 0, iowrite = 0;
static char *regname(unsigned long addr)
{
@@ -80,36 +73,43 @@
return name;
}
-unsigned long io_i915_READ32(unsigned long addr)
+unsigned long io_i915_read32(unsigned long addr)
{
unsigned long val;
outl(addr, addrport);
val = inl(dataport);
+ ioread += 2;
if (verbose & vio)printk(BIOS_SPEW, "%s: Got %08lx\n", regname(addr), val);
return val;
}
-void io_i915_WRITE32(unsigned long val, unsigned long addr)
+void io_i915_write32(unsigned long val, unsigned long addr)
{
if (verbose & vio)printk(BIOS_SPEW, "%s: outl %08lx\n", regname(addr), val);
outl(addr, addrport);
outl(val, dataport);
+ iowrite += 2;
}
+/* GTT is the Global Translation Table for the graphics pipeline.
+ * It is used to translate graphics addresses to physical
+ * memory addresses. As in the CPU, GTTs map 4K pages.
+ * The setgtt function adds a further bit of flexibility:
+ * it allows you to set a range (the first two parameters) to point
+ * to a physical address (third parameter);the physical address is
+ * incremented by a count (fourth parameter) for each GTT in the
+ * range.
+ * Why do it this way? For ultrafast startup,
+ * we can point all the GTT entries to point to one page,
+ * and set that page to 0s:
+ * memset(physbase, 0, 4096);
+ * setgtt(0, 4250, physbase, 0);
+ * this takes about 2 ms, and is a win because zeroing
+ * the page takes a up to 200 ms.
+ * This call sets the GTT to point to a linear range of pages
+ * starting at physbase.
+ */
-/*
- 2560
- 4 words per
- 4 *p
- 10240
- 4k bytes per page
- 4096/p
- 2.50
- 1700 lines
- 1700 * p
- 4250.00
- PTEs
-*/
static void
setgtt(int start, int end, unsigned long base, int inc)
{
@@ -117,7 +117,7 @@
for(i = start; i < end; i++){
u32 word = base + i*inc;
- WRITE32(word|1,(i*4)|1);
+ io_i915_write32(word|1,(i*4)|1);
}
}
@@ -137,36 +137,29 @@
return microseconds(globalstart, rdtscll());
}
-extern struct iodef iodefs[];
-extern int niodefs;
-
static int i915_init_done = 0;
-/* fill the palette. This runs when the P opcode is hit. */
-static void palette(void)
-{
- int i;
- unsigned long color = 0;
-
- for(i = 0; i < 256; i++, color += 0x010101){
- io_i915_WRITE32(color, _LGC_PALETTE_A + (i<<2));
- }
-}
-
-int vbe_mode_info_valid(void);
int vbe_mode_info_valid(void)
{
return i915_init_done;
}
-void fill_lb_framebuffer(struct lb_framebuffer *framebuffer);
void fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
{
- printk(BIOS_SPEW, "fill_lb_framebuffer: graphics is %p\n", (void *)graphics);
+ printk(BIOS_SPEW, "fill_lb_framebuffer: graphics is %p\n",
+ (void *)graphics);
+ /* Please note: these will be filled from EDID.
+ * these values are a placeholder.
+ */
framebuffer->physical_address = graphics;
- framebuffer->x_resolution = 2560;
+ /* these are a fantasy, but will be fixed once we're getting
+ * info from the hardware. Hard to get from the device tree,
+ * which is arguably a defect of the device tree. Bear with me,
+ * this Will Get Fixed.
+ */
+ framebuffer->x_resolution = 1960;
framebuffer->y_resolution = 1700;
- framebuffer->bytes_per_line = 10240;
+ framebuffer->bytes_per_line = 1960*4;
framebuffer->bits_per_pixel = 32;
framebuffer->red_mask_pos = 16;
framebuffer->red_mask_size = 8;
@@ -179,94 +172,21 @@
}
-static unsigned long times[4096];
-
-static int run(int index)
-{
- int i, prev = 0;
- struct iodef *id, *lastidread = 0;
- unsigned long u, t;
- if (index >= niodefs)
- return index;
- /* state machine! */
- for(i = index, id = &iodefs[i]; id->op; i++, id++){
- switch(id->op){
- case M:
- if (verbose & vmsg) printk(BIOS_SPEW, "%ld: %s\n",
- globalmicroseconds(), id->msg);
- break;
- case P:
- palette();
- break;
- case R:
- u = READ32(id->addr);
- if (verbose & vio)
- printk(BIOS_SPEW, "\texpect %08lx\n", id->data);
- /* we're looking for something. */
- if (lastidread->addr == id->addr){
- /* they're going to be polling.
- * just do it 1000 times
- */
- for(t = 0; t < 1000 && id->data != u; t++){
- u = READ32(id->addr);
- }
- if (verbose & vspin) printk(BIOS_SPEW,
- "%s: # loops %ld got %08lx want %08lx\n",
- regname(id->addr),
- t, u, id->data);
- }
- lastidread = id;
- break;
- case W:
- WRITE32(id->data, id->addr);
- if (id->addr == PCH_PP_CONTROL){
- if (verbose & vio)
- printk(BIOS_SPEW, "PCH_PP_CONTROL\n");
- switch(id->data & 0xf){
- case 8: break;
- case 7: break;
- default: udelay(100000);
- if (verbose & vio)
- printk(BIOS_SPEW, "U %d\n", 100000);
- }
- }
- break;
- case V:
- if (id->count < 8){
- prev = verbose;
- verbose = id->count;
- } else {
- verbose = prev;
- }
- printk(BIOS_SPEW, "Change verbosity to %d\n", verbose);
- break;
- case I:
- printk(BIOS_SPEW, "run: return %d\n", i+1);
- return i+1;
- break;
- default:
- printk(BIOS_SPEW, "BAD TABLE, opcode %d @ %d\n", id->op, i);
- return -1;
- }
- if (id->udelay)
- udelay(id->udelay);
- if (i < ARRAY_SIZE(times))
- times[i] = globalmicroseconds();
- }
- printk(BIOS_SPEW, "run: return %d\n", i);
- return i+1;
-}
-
-int i915lightup(unsigned int physbase, unsigned int iobase, unsigned int mmio,
+int i915lightup(unsigned int physbase,
+ unsigned int iobase,
+ unsigned int mmio,
unsigned int gfx);
int i915lightup(unsigned int pphysbase, unsigned int piobase,
unsigned int pmmio, unsigned int pgfx)
{
- static struct edid edid;
+ int must_cycle_power = 0;
- int index;
- u32 auxin[16], auxout[16];
+ /* frame buffer pointer */
+ u32 *l;
+ int i;
+ unsigned long before_gtt, after_gtt;
+
mmio = (void *)pmmio;
addrport = piobase;
dataport = addrport + 4;
@@ -278,128 +198,55 @@
(void *)graphics, mmio, addrport, physbase);
globalstart = rdtscll();
-
- index = run(0);
- if (0){
- decode_edid((unsigned char *)&link_edid_data, sizeof(link_edid_data), &edid);
-
- htotal = (edid.ha - 1) | ((edid.ha + edid.hbl- 1) << 16);
- printk(BIOS_SPEW, "I915_WRITE(HTOTAL(pipe), %08x)\n", htotal);
-
- hblank = (edid.ha - 1) | ((edid.ha + edid.hbl- 1) << 16);
- printk(BIOS_SPEW, "I915_WRITE(HBLANK(pipe),0x%08x)\n", hblank);
-
- hsync = (edid.ha + edid.hso - 1) |
- ((edid.ha + edid.hso + edid.hspw- 1) << 16);
- printk(BIOS_SPEW, "I915_WRITE(HSYNC(pipe),0x%08x)\n", hsync);
-
- vtotal = (edid.va - 1) | ((edid.va + edid.vbl- 1) << 16);
- printk(BIOS_SPEW, "I915_WRITE(VTOTAL(pipe), %08x)\n", vtotal);
-
- vblank = (edid.va - 1) | ((edid.va + edid.vbl- 1) << 16);
- printk(BIOS_SPEW, "I915_WRITE(VBLANK(pipe),0x%08x)\n", vblank);
-
- vsync = (edid.va + edid.vso - 1) |((edid.va + edid.vso + edid.vspw- 1) << 16);
- printk(BIOS_SPEW, "I915_WRITE(VSYNC(pipe),0x%08x)\n", vsync);
-
- printk(BIOS_SPEW, "Table has %d elements\n", niodefs);
-
- index = run(0);
- printk(BIOS_SPEW, "Run returns %d\n", index);
- auxout[0] = 1<<31 /* dp */|0x1<<28/*R*/|DP_DPCD_REV<<8|0xe;
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 4, auxin, 14);
- auxout[0] = 0<<31 /* i2c */|1<<30|0x0<<28/*W*/|0x0<<8|0x0;
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 3, auxin, 0);
- index = run(index);
- printk(BIOS_SPEW, "Run returns %d\n", index);
- auxout[0] = 0<<31 /* i2c */|0<<30|0x0<<28/*W*/|0x0<<8|0x0;
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 3, auxin, 0);
- index = run(index);
- printk(BIOS_SPEW, "Run returns %d\n", index);
- auxout[0] = 1<<31 /* dp */|0x0<<28/*W*/|DP_SET_POWER<<8|0x0;
- auxout[1] = 0x01000000;
- /* DP_SET_POWER_D0 | DP_PSR_SINK_INACTIVE |
- * (0x0<<13602104)|0x00000001*/ /* broken, fix. */
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 5, auxin, 0);
- index = run(index);
- auxout[0] = 1<<31 /* dp */|0x0<<28/*W*/|DP_LINK_BW_SET<<8|0x8;
- auxout[1] = 0x0a840000;
- /*( DP_LINK_BW_2_7 &0xa)|0x0000840a*/
- auxout[2] = 0x00000000;
- auxout[3] = 0x01000000;
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 13, auxin, 0);
- index = run(index);
- auxout[0] = 1<<31 /* dp */|0x0<<28/*W*/|DP_TRAINING_PATTERN_SET<<8|0x0;
- auxout[1] = 0x21000000;
- /* DP_TRAINING_PATTERN_1 | DP_LINK_SCRAMBLING_DISABLE |
- * DP_SYMBOL_ERROR_COUNT_BOTH |0x00000021*/
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 5, auxin, 0);
- index = run(index);
- auxout[0] = 1<<31 /* dp */|0x0<<28/*W*/|DP_TRAINING_LANE0_SET<<8|0x3;
- auxout[1] = 0x00000000;
- /* DP_TRAIN_VOLTAGE_SWING_400 | DP_TRAIN_PRE_EMPHASIS_0 |0x00000000*/
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 8, auxin, 0);
- index = run(index);
- auxout[0] = 1<<31 /* dp */|0x1<<28/*R*/|DP_LANE0_1_STATUS<<8|0x5;
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 4, auxin, 5);
- index = run(index);
- auxout[0] = 1<<31 /* dp */|0x0<<28/*W*/|DP_TRAINING_PATTERN_SET<<8|0x0;
- auxout[1] = 0x22000000;
- /* DP_TRAINING_PATTERN_2 | DP_LINK_SCRAMBLING_DISABLE |
- * DP_SYMBOL_ERROR_COUNT_BOTH |0x00000022*/
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 5, auxin, 0);
- index = run(index);
- auxout[0] = 1<<31 /* dp */|0x0<<28/*W*/|DP_TRAINING_LANE0_SET<<8|0x3;
- auxout[1] = 0x00000000;
- /* DP_TRAIN_VOLTAGE_SWING_400 | DP_TRAIN_PRE_EMPHASIS_0 |0x00000000*/
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 8, auxin, 0);
- index = run(index);
- auxout[0] = 1<<31 /* dp */|0x1<<28/*R*/|DP_LANE0_1_STATUS<<8|0x5;
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 4, auxin, 5);
- index = run(index);
- auxout[0] = 1<<31 /* dp */|0x0<<28/*W*/|DP_TRAINING_PATTERN_SET<<8|0x0;
- auxout[1] = 0x00000000;
- /* DP_TRAINING_PATTERN_DISABLE | DP_LINK_QUAL_PATTERN_DISABLE |
- * DP_SYMBOL_ERROR_COUNT_BOTH |0x00000000*/
- intel_dp_aux_ch(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, auxout, 5, auxin, 0);
- index = run(index);
- }
-
- if (index != niodefs)
- printk(BIOS_ERR, "Left over IO work in i915_lightup"
- " -- this is likely a table error. "
- "Only %d of %d were done.\n", index, niodefs);
- printk(BIOS_SPEW, "DONE startup\n");
+ /* turn it on. The VBIOS does it this way, so we hope that's ok. */
verbose = 0;
- /* GTT is the Global Translation Table for the graphics pipeline.
- * It is used to translate graphics addresses to physical
- * memory addresses. As in the CPU, GTTs map 4K pages.
- * There are 32 bits per pixel, or 4 bytes,
- * which means 1024 pixels per page.
- * There are 4250 GTTs on Link:
- * 2650 (X) * 1700 (Y) pixels / 1024 pixels per page.
- * The setgtt function adds a further bit of flexibility:
- * it allows you to set a range (the first two parameters) to point
- * to a physical address (third parameter);the physical address is
- * incremented by a count (fourth parameter) for each GTT in the
- * range.
- * Why do it this way? For ultrafast startup,
- * we can point all the GTT entries to point to one page,
- * and set that page to 0s:
- * memset(physbase, 0, 4096);
- * setgtt(0, 4250, physbase, 0);
- * this takes about 2 ms, and is a win because zeroing
- * the page takes a up to 200 ms. We will be exploiting this
- * trick in a later rev of this code.
- * This call sets the GTT to point to a linear range of pages
- * starting at physbase.
+ io_i915_write32(0xabcd000f, PCH_PP_CONTROL);
+
+ /* the AUX channel needs a small amount of time to spin up.
+ * Rather than udelay, do some useful work:
+ * Zero out the frame buffer memory,
+ * and set the global translation table (GTT)
*/
+ printk(BIOS_SPEW, "Set not-White (%08x) for %d pixels\n", 0xffffff,
+ FRAME_BUFFER_BYTES/sizeof(u32));
+ for(l = (u32 *)graphics, i = 0;
+ i < FRAME_BUFFER_BYTES/sizeof(u32); i++){
+ l[i] = 0x1122ff;
+ }
+ printk(BIOS_SPEW, "GTT: set %d pages starting at %p\n",
+ FRAME_BUFFER_PAGES, (void *)physbase);
+ before_gtt = globalmicroseconds();
setgtt(0, FRAME_BUFFER_PAGES, physbase, 4096);
- printk(BIOS_SPEW, "memset %p to 0 for %d bytes\n",
- (void *)graphics, FRAME_BUFFER_BYTES);
- memset((void *)graphics, 0, FRAME_BUFFER_BYTES);
- printk(BIOS_SPEW, "%ld microseconds\n", globalmicroseconds());
+ after_gtt = globalmicroseconds();
+
+ /* The reset is basically harmless, and can be
+ * repeated by the VBIOS in any event.
+ */
+
+ graphics_register_reset(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, verbose);
+
+ /* failures after this point can return without
+ * powering off the panel.
+ */
+
+ if (1)
+ goto fail;
+ /* failures after this point MUST power off the panel
+ * and wait 600 ms.
+ */
+
i915_init_done = 1;
oprom_is_loaded = 1;
+ return 1;
+
+fail:
+ printk(BIOS_SPEW, "Graphics could not be started;");
+ if (must_cycle_power){
+ printk(BIOS_SPEW, "Turn off power and wait ...");
+ io_i915_write32(0xabcd0000, PCH_PP_CONTROL);
+ udelay(600000);
+ }
+ printk(BIOS_SPEW, "Returning.\n");
return 0;
+
}
diff --git a/src/mainboard/intel/wtm2/i915io.c b/src/mainboard/intel/wtm2/i915io.c
deleted file mode 100644
index fed8564..0000000
--- a/src/mainboard/intel/wtm2/i915io.c
+++ /dev/null
@@ -1,7563 +0,0 @@
-/*
-* This file is part of the coreboot project.
-*
-* Copyright 2012 Google Inc.
-*
-* This program is free software; you can redistribute it and/or modify
-* it under the terms of the GNU General Public License as published by
-* the Free Software Foundation; version 2 of the License.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-*/
-#include <stdint.h>
-#include "i915io.h"
-
-struct iodef iodefs[] = {
- {V,7},
-{R, 1, "", ILK_DSPCLK_GATE, 0x00000013, 0},
-{R, 1, "", FORCEWAKE_MT_ACK, 0x40000006, 0},
-{R, 2, "", 0x45400, 0x00000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 1, "", 0x45400, 0xc0000000, 0},
-{R, 1, "", _CURACNTR, 0x00000000, 0},
-{W, 1, "", _CURACNTR, 0x00000000, 0},
-{R, 1, "", _DSPACNTR, 0x00000000, 0},
-{W, 1, "", _DSPACNTR, 0x00000000, 0},
-{R, 1, "", _DSPBCNTR, 0x00000000, 0},
-{W, 1, "", _DSPBCNTR, 0x00000000, 0},
-{R, 1, "", CPU_VGACNTRL, 0x80002900, 0},
-{W, 1, "", CPU_VGACNTRL, 0x8000298e, 0},
-{R, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 1, "", _DSPBSURF, 0x00000000, 0},
-{W, 1, "", _DSPBSURF, 0x00000000, 0},
-{R, 1, "", 0x4f008, 0x00000000, 0},
-{W, 1, "", 0x4f008, 0x00000000, 0},
-{R, 1, "", 0x4f008, 0x00000000, 0},
-{W, 1, "", 0x4f008, 0x00000000, 0},
-{R, 1, "", 0x4f008, 0x00000000, 0},
-{W, 1, "", 0x4f008, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x00000000, 0},
-{W, 1, "", 0x4f040, 0x01000001, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{W, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x00000000, 0},
-{W, 1, "", 0x4f04c, 0x03030000, 0},
-{R, 1, "", 0x4f050, 0x00000000, 0},
-{W, 1, "", 0x4f050, 0x00000000, 0},
-{R, 1, "", 0x4f054, 0x00000000, 0},
-{W, 1, "", 0x4f054, 0x00000001, 0},
-{R, 1, "", 0x4f058, 0x00000000, 0},
-{W, 1, "", 0x4f058, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x03030000, 0},
-{W, 1, "", 0x4f04c, 0x03430000, 0},
-{R, 1, "", 0x4f04c, 0x03430000, 0},
-{W, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f000, 0x00000000, 0},
-{W, 1, "", 0x4f000, 0x02580320, 0},
-{R, 1, "", DP_A, DP_SCRAMBLING_DISABLE_IRONLAKE |0x00000081, 0},
-{W, 1, "", DP_A, DP_SCRAMBLING_DISABLE_IRONLAKE | DP_SYNC_VS_HIGH |0x00000091, 0},
-{R, 1, "", _FDI_RXA_MISC, 0x00000000, 0},
-{W, 1, "", _FDI_RXA_MISC, 0x00200090, 0},
-{R, 1, "", _FDI_RXA_MISC, 0x00000000, 0},
-{W, 1, "", _FDI_RXA_MISC, 0x0a000000, 0},
-{R, 1, "", 0x46408, 0x00000060, 0},
-{W, 1, "", 0x46408, 0x00000070, 0},
-{R, 1, "", 0x42090, 0x00000000, 0},
-{W, 1, "", 0x42090, 0x04000000, 0},
-{R, 1, "", 0x4f050, 0x00000000, 0},
-{W, 1, "", 0x4f050, 0x40000000, 0},
-{R, 1, "", 0x9840, 0x00000080, 0},
-{W, 1, "", 0x9840, 0x00000000, 0},
-{R, 1, "", 0x42090, 0x04000000, 0},
-{W, 1, "", 0x42090, 0xa4000000, 0},
-{R, 1, "", 0x42080, 0x00000000, 0},
-{W, 1, "", 0x42080, 0x00004000, 0},
-{R, 1, "", 0x64f80, 0x00000000, 0},
-{W, 1, "", 0x64f80, 0x00ffffff, 0},
-{R, 1, "", 0x64f84, 0x00000000, 0},
-{W, 1, "", 0x64f84, 0x0007000e, 0},
-{R, 1, "", 0x64f88, 0x00000000, 0},
-{W, 1, "", 0x64f88, 0x00d75fff, 0},
-{R, 1, "", 0x64f8c, 0x00000000, 0},
-{W, 1, "", 0x64f8c, 0x000f000a, 0},
-{R, 1, "", 0x64f90, 0x00000000, 0},
-{W, 1, "", 0x64f90, 0x00c30fff, 0},
-{R, 1, "", 0x64f94, 0x00000000, 0},
-{W, 1, "", 0x64f94, 0x00060006, 0},
-{R, 1, "", 0x64f98, 0x00000000, 0},
-{W, 1, "", 0x64f98, 0x00aaafff, 0},
-{R, 1, "", 0x64f9c, 0x00000000, 0},
-{W, 1, "", 0x64f9c, 0x001e0000, 0},
-{R, 1, "", 0x64fa0, 0x00000000, 0},
-{W, 1, "", 0x64fa0, 0x00ffffff, 0},
-{R, 1, "", 0x64fa4, 0x00000000, 0},
-{W, 1, "", 0x64fa4, 0x000f000a, 0},
-{R, 1, "", 0x64fa8, 0x00000000, 0},
-{W, 1, "", 0x64fa8, 0x00d75fff, 0},
-{R, 1, "", 0x64fac, 0x00000000, 0},
-{W, 1, "", 0x64fac, 0x00160004, 0},
-{R, 1, "", 0x64fb0, 0x00000000, 0},
-{W, 1, "", 0x64fb0, 0x00c30fff, 0},
-{R, 1, "", 0x64fb4, 0x00000000, 0},
-{W, 1, "", 0x64fb4, 0x001e0000, 0},
-{R, 1, "", 0x64fb8, 0x00000000, 0},
-{W, 1, "", 0x64fb8, 0x00ffffff, 0},
-{R, 1, "", 0x64fbc, 0x00000000, 0},
-{W, 1, "", 0x64fbc, 0x00060006, 0},
-{R, 1, "", 0x64fc0, 0x00000000, 0},
-{W, 1, "", 0x64fc0, 0x00d75fff, 0},
-{R, 1, "", 0x64fc4, 0x00000000, 0},
-{W, 1, "", 0x64fc4, 0x001e0000, 0},
-{R, 1, "", 0x64e00, 0x00000000, 0},
-{W, 1, "", 0x64e00, 0x00ffffff, 0},
-{R, 1, "", 0x64e04, 0x00000000, 0},
-{W, 1, "", 0x64e04, 0x0006000e, 0},
-{R, 1, "", 0x64e08, 0x00000000, 0},
-{W, 1, "", 0x64e08, 0x00d75fff, 0},
-{R, 1, "", 0x64e0c, 0x00000000, 0},
-{W, 1, "", 0x64e0c, 0x0005000a, 0},
-{R, 1, "", 0x64e10, 0x00000000, 0},
-{W, 1, "", 0x64e10, 0x00c30fff, 0},
-{R, 1, "", 0x64e14, 0x00000000, 0},
-{W, 1, "", 0x64e14, 0x00040006, 0},
-{R, 1, "", 0x64e18, 0x00000000, 0},
-{W, 1, "", 0x64e18, 0x80aaafff, 0},
-{R, 1, "", 0x64e1c, 0x00000000, 0},
-{W, 1, "", 0x64e1c, 0x000b0000, 0},
-{R, 1, "", 0x64e20, 0x00000000, 0},
-{W, 1, "", 0x64e20, 0x00ffffff, 0},
-{R, 1, "", 0x64e24, 0x00000000, 0},
-{W, 1, "", 0x64e24, 0x0005000a, 0},
-{R, 1, "", 0x64e28, 0x00000000, 0},
-{W, 1, "", 0x64e28, 0x00d75fff, 0},
-{R, 1, "", 0x64e2c, 0x00000000, 0},
-{W, 1, "", 0x64e2c, 0x000c0004, 0},
-{R, 1, "", 0x64e30, 0x00000000, 0},
-{W, 1, "", 0x64e30, 0x80c30fff, 0},
-{R, 1, "", 0x64e34, 0x00000000, 0},
-{W, 1, "", 0x64e34, 0x000b0000, 0},
-{R, 1, "", 0x64e38, 0x00000000, 0},
-{W, 1, "", 0x64e38, 0x00ffffff, 0},
-{R, 1, "", 0x64e3c, 0x00000000, 0},
-{W, 1, "", 0x64e3c, 0x00040006, 0},
-{R, 1, "", 0x64e40, 0x00000000, 0},
-{W, 1, "", 0x64e40, 0x80d75fff, 0},
-{R, 1, "", 0x64e44, 0x00000000, 0},
-{W, 1, "", 0x64e44, 0x000b0000, 0},
-{R, 1, "", DP_A, DP_SCRAMBLING_DISABLE_IRONLAKE | DP_SYNC_VS_HIGH |0x00000091, 0},
-{R, 1, "", DIGITAL_PORT_HOTPLUG_CNTRL, 0x00000000, 0},
-{W, 1, "", DIGITAL_PORT_HOTPLUG_CNTRL, DIGITAL_PORTA_HOTPLUG_ENABLE |0x00000010, 0},
-{R, 1, "", SDEISR+0x30, 0x00000000, 0},
-{W, 1, "", SDEISR+0x30, 0x10000000, 0},
-{R, 1, "", PCH_PP_CONTROL, 0x00000000, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)|0xabcd0000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)|0xabcd0000, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{R, 1, "", DPA_AUX_CH_CTL, /*[0bytes]*/0x000300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY |/*[0bytes]*/0x800300e1, 0},
-{R, 22, "", DEISR, 0x00000000, 0},
-{R, 1, "", DEISR, 0x08000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000000, 0},
-{R, 2, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE | DP_AUX_CH_CTL_TIME_OUT_ERROR |/*[20bytes]*/0x514300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE | DP_AUX_CH_CTL_TIME_OUT_ERROR | DP_AUX_CH_CTL_RECEIVE_ERROR |/*[20bytes]*/0x534300e1, 0},
-{R, 2, "", DPA_AUX_CH_CTL, /*[20bytes]*/0x014300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY |/*[4bytes]*/0x804300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00110000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00110000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*4000: Write */0x40005000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*1000: Read */0x10005003, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[5bytes]*/0x405300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x0000ffff, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0xff000000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x0000ffff, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*4000: Write */0x40005000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0xff000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x04000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[5bytes]*/0x405300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*1000: Read */0x10005003, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[5bytes]*/0x405300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00ffffff, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00ffffff, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*4000: Write */0x40005000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[5bytes]*/0x405300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*5000: Read */0x5000500f, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x0000ffff, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0xffffffff, 0},
-{R, 1, "", DPA_AUX_CH_DATA3, 0x000dae43, 0},
-{R, 1, "", DPA_AUX_CH_DATA4, 0x13000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA5, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x0000ffff, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*5000: Read */0x5000500f, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00341501, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x04a51c10, 0},
-{R, 1, "", DPA_AUX_CH_DATA3, 0x780293ad, 0},
-{R, 1, "", DPA_AUX_CH_DATA4, 0xa9534c96, 0},
-{R, 1, "", DPA_AUX_CH_DATA5, 0x25000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00341501, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*5000: Read */0x5000500f, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00114f53, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000001, 0},
-{R, 1, "", DPA_AUX_CH_DATA3, 0x01010101, 0},
-{R, 1, "", DPA_AUX_CH_DATA4, 0x01010101, 0},
-{R, 1, "", DPA_AUX_CH_DATA5, 0x01000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00114f53, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*5000: Read */0x5000500f, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00010101, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x01010136, 0},
-{R, 1, "", DPA_AUX_CH_DATA3, 0x3680a070, 0},
-{R, 1, "", DPA_AUX_CH_DATA4, 0x3820402e, 0},
-{R, 1, "", DPA_AUX_CH_DATA5, 0x1e000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00010101, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*5000: Read */0x5000500f, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x0024001a, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0xa5100000, 0},
-{R, 1, "", DPA_AUX_CH_DATA3, 0x18242480, 0},
-{R, 1, "", DPA_AUX_CH_DATA4, 0xa0703820, 0},
-{R, 1, "", DPA_AUX_CH_DATA5, 0x40000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x0024001a, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*5000: Read */0x5000500f, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x002e1e24, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x001aa510, 0},
-{R, 1, "", DPA_AUX_CH_DATA3, 0x00001800, 0},
-{R, 1, "", DPA_AUX_CH_DATA4, 0x0000fe00, 0},
-{R, 1, "", DPA_AUX_CH_DATA5, 0x43000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x002e1e24, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*5000: Read */0x5000500f, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x004d4e0a, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x20202020, 0},
-{R, 1, "", DPA_AUX_CH_DATA3, 0x20202020, 0},
-{R, 1, "", DPA_AUX_CH_DATA4, 0x20000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA5, 0xfe000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x004d4e0a, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*5000: Read */0x5000500f, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00004e31, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x33334853, 0},
-{R, 1, "", DPA_AUX_CH_DATA3, 0x452d4541, 0},
-{R, 1, "", DPA_AUX_CH_DATA4, 0x310a2000, 0},
-{R, 1, "", DPA_AUX_CH_DATA5, 0xcd000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00004e31, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*1000: Write */0x10005000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[17bytes]*/0x411300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00ff0000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00ff0000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000100, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x000a0000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x000a0000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000200, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00020000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", BLC_PWM_CPU_CTL, 0x00000000, 0},
-{W, 1, "", BLC_PWM_CPU_CTL, 0x03a903a9, 0},
-{R, 1, "", BLC_PWM_PCH_CTL2, 0x00000000, 0},
-{W, 1, "", BLC_PWM_PCH_CTL2, 0x03a903a9, 0},
-{R, 1, "", BLC_PWM_PCH_CTL1, 0x00000000, 0},
-{W, 1, "", BLC_PWM_PCH_CTL1, 0x00000000, 0},
-{R, 1, "", 0x4f050, 0x40000000, 0},
-{R, 1, "", 0x64f68, 0x00000000, 0},
-{W, 1, "", 0x64f68, 0x00ffffff, 0},
-{R, 1, "", 0x64f6c, 0x00000000, 0},
-{W, 1, "", 0x64f6c, 0x00040006, 0},
-{R, 1, "", _FDI_RXB_CHICKEN+4, 0x00000006, 0},
-{R, 1, "", SDEISR+0x30, 0x10000000, 0},
-{W, 1, "", SDEISR+0x30, PORTB_HOTPLUG_ENABLE |0x10000010, 0},
-{R, 1, "", SDEISR, 0x00000000, 0},
-{R, 1, "", 0x64f08, 0x00000000, 0},
-{W, 1, "", 0x64f08, 0x00ffffff, 0},
-{R, 1, "", 0x64f0c, 0x00000000, 0},
-{W, 1, "", 0x64f0c, 0x00040006, 0},
-{R, 1, "", _FDI_RXB_CHICKEN+4, 0x00000006, 0},
-{R, 1, "", SDEISR+0x30, PORTB_HOTPLUG_ENABLE |0x10000010, 0},
-{W, 1, "", SDEISR+0x30, PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |0x10001010, 0},
-{R, 1, "", SDEISR, 0x00000000, 0},
-{R, 2, "", 0x4f008, 0x00000000, 0},
-{R, 1, "", 0x4f054, 0x00000001, 0},
-{W, 1, "", 0x4f054, 0x0000420c, 0},
-{R, 1, "", 0x4f054, 0x0000420c, 0},
-{R, 1, "", 0x4f008, 0x00000000, 0},
-{W, 1, "", 0x4f008, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00000800, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS0, 0x00000005, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008800, 0},
-{R, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS1, 0x4e0400a1, 0},
-{R, 2, "", PCH_GMBUS2, 0x00008c00, 0},
-{R, 1, "", PCH_GMBUS1, 0x060400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x80000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x860400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS1, 0x060400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000005, 0},
-{W, 1, "", PCH_GMBUS0, 0x48000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{W, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS0, 0x00000005, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000005, 0},
-{W, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{W, 1, "", PCH_GMBUS1, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", PCH_GPIOE, 0x00001818, 0},
-{W, 1, "", PCH_GPIOE, 0x00000118, 0},
-{R, 1, "", PCH_GPIOE, 0x00001818, 0},
-{W, 1, "", PCH_GPIOE, 0x00000018, 0},
-{R, 1, "", PCH_GPIOE, 0x00001818, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001818, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", PCH_GPIOE, 0x00001818, 0},
-{W, 1, "", PCH_GPIOE, 0x00001803, 0},
-{R, 1, "", PCH_GPIOE, 0x0000181a, 0},
-{W, 1, "", PCH_GPIOE, 0x00001802, 0},
-{R, 1, "", PCH_GPIOE, 0x0000181a, 0},
-{W, 1, "", PCH_GPIOE, 0x00001807, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001806, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001803, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001802, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001807, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001806, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001803, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001802, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001807, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001806, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001803, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001802, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001807, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001806, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001803, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001802, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001807, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001806, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001803, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001802, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001807, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001806, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001803, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001802, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001807, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001806, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001803, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001802, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001807, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001806, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001803, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001802, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001807, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001806, 0},
-{R, 1, "", PCH_GPIOE, 0x00001802, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001801, 0},
-{R, 1, "", PCH_GPIOE, 0x00001810, 0},
-{W, 1, "", PCH_GPIOE, 0x00001800, 0},
-{R, 1, "", PCH_GMBUS1, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS0, 0x48000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{W, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS0, 0x00000005, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{W, 1, "", PCH_GMBUS1, 0x4e0400a1, 0},
-{R, 2, "", PCH_GMBUS2, 0x00008c00, 0},
-{R, 1, "", PCH_GMBUS1, 0x060400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x80000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x860400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS1, 0x060400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000005, 0},
-{W, 1, "", PCH_GMBUS0, 0x48000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{W, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", 0x4f008, 0x00000000, 0},
-{W, 1, "", 0x4f008, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS0, 0x00000004, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{W, 1, "", PCH_GMBUS1, 0x4e0400a1, 0},
-{R, 2, "", PCH_GMBUS2, 0x00008c00, 0},
-{R, 1, "", PCH_GMBUS1, 0x060400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x80000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x860400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS1, 0x060400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000004, 0},
-{W, 1, "", PCH_GMBUS0, 0x48000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{W, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS0, 0x00000004, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000004, 0},
-{W, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{W, 1, "", PCH_GMBUS1, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS0, 0x48000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{W, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS0, 0x00000004, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{W, 1, "", PCH_GMBUS1, 0x4e0400a1, 0},
-{R, 2, "", PCH_GMBUS2, 0x00008c00, 0},
-{R, 1, "", PCH_GMBUS1, 0x060400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x80000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x860400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS1, 0x060400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000004, 0},
-{W, 1, "", PCH_GMBUS0, 0x48000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{W, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", 0x4f054, 0x0000420c, 0},
-{W, 1, "", 0x4f054, 0x0000420c, 0},
-{R, 1, "", PCH_GMBUS2, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS0, 0x00000002, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{W, 1, "", PCH_GMBUS1, 0x4a0000a0, 0},
-{R, 3841, "", PCH_GMBUS2, 0x00008200, 0},
-{R, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{W, 1, "", PCH_GMBUS5, 0x00000000, 0},
-{R, 1, "", PCH_GMBUS1, 0x420000a0, 0},
-{W, 1, "", PCH_GMBUS1, 0x4e0400a1, 0},
-{R, 3841, "", PCH_GMBUS2, 0x00008200, 0},
-{R, 1, "", PCH_GMBUS3, 0x00000000, 0},
-{R, 3840, "", PCH_GMBUS2, 0x00008200, 0},
-{R, 1, "", PCH_GMBUS1, 0x460400a1, 0},
-{W, 1, "", PCH_GMBUS1, 0x480000a0, 0},
-{R, 3840, "", PCH_GMBUS2, 0x00008200, 0},
-{R, 1, "", PCH_GMBUS0, 0x00000002, 0},
-{W, 1, "", PCH_GMBUS0, 0x48000000, 0},
-{R, 1, "", PCH_GMBUS2, 0x00008200, 0},
-{W, 1, "", PCH_GMBUS2, 0x00008000, 0},
-{R, 1, "", 0x4f054, 0x0000420c, 0},
-{R, 1, "", 0x4f040, 0x01000001, 0},
-{R, 1, "", 0x4f054, 0x0000420c, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 3, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000001, 0},
-{W, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f05c, 0x00000000, 0},
-{W, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f060, 0x00000000, 0},
-{W, 1, "", 0x4f060, 0x00000008, 0},
-{R, 2, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 1, "", 0x45400, 0xc0000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f000, 0x02580320, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f054, 0x0000420c, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 3, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{W, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{W, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f000, 0x02580320, 0},
-{W, 1, "", 0x4f000, 0x02580320, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 2, "", CPU_VGACNTRL, 0x8000298e, 0},
-{W, 1, "", CPU_VGACNTRL, 0x8000298e, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 2, "", _CURACNTR, 0x00000000, 0},
-{W, 1, "", _CURACNTR, 0x00000000, 0},
-{R, 2, "", _CURABASE, 0x00000000, 0},
-{W, 1, "", _CURABASE, 0x00000000, 0},
-{R, 1, "", _DSPACNTR, 0x00000000, 0},
-{W, 1, "", _DSPACNTR, 0x00000000, 0},
-{R, 2, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000400, 0},
-{R, 2, "", _CURBCNTR_IVB, 0x00000000, 0},
-{W, 1, "", _CURBCNTR_IVB, 0x00000000, 0},
-{R, 2, "", _CURBBASE_IVB, 0x00000000, 0},
-{W, 1, "", _CURBBASE_IVB, 0x00000000, 0},
-{R, 1, "", _DSPBCNTR, 0x00000000, 0},
-{W, 1, "", _DSPBCNTR, 0x00000000, 0},
-{R, 2, "", _DSPBSURF, 0x00000000, 0},
-{W, 1, "", _DSPBSURF, 0x00000000, 0},
-{R, 1, "", 0x72080, 0x00000000, 0},
-{W, 1, "", 0x72080, 0x00000000, 0},
-{R, 2, "", 0x72084, 0x00000000, 0},
-{W, 1, "", 0x72084, 0x00000000, 0},
-{R, 1, "", _DVSACNTR, 0x00000000, 0},
-{W, 1, "", _DVSACNTR, 0x00000000, 0},
-{R, 2, "", _DVSASURF, 0x00000000, 0},
-{W, 1, "", _DVSASURF, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{W, 1, "", DEIIR, 0x00008000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000400, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f400, 0x00030000, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x7f008, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 3, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x61400, 0x00030000, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 3, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", _PIPEBCONF, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{W, 1, "", 0x4f044, 0x00000600, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 2, "", 0x4f044, 0x00000600, 0},
-{R, 1, "", 0x62400, 0x00030000, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 2, "", 0x4f044, 0x00000600, 0},
-{R, 1, "", 0x72008, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000600, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{W, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{W, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f060, 0x00000008, 0},
-{W, 1, "", 0x4f060, 0x00000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", CPU_VGACNTRL, 0x8000298e, 0},
-{W, 1, "", CPU_VGACNTRL, 0x8020298e, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000000, 0},
-{W, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", _DSPAADDR, 0x00000000, 0},
-{W, 1, "", _DSPAADDR, 0x00000000, 0},
-{R, 2, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x7f008, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD |0xabcd0008, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY |/*[0bytes]*/0x800300e1, 0},
-{R, 1, "", PCH_PP_ON_DELAYS, 0x00000000, 0},
-{W, 1, "", PCH_PP_ON_DELAYS, /*PANEL_PORT_SELECT_DPA |( PANEL_POWER_UP_DELAY &0x7d00000)|( PANEL_LIGHT_ON_DELAY &0xa)|*/0x47d0000a, 0},
-{R, 1, "", PCH_PP_OFF_DELAYS, 0x00000000, 0},
-{W, 1, "", PCH_PP_OFF_DELAYS, /*( PANEL_POWER_DOWN_DELAY &0x1f40000)|( PANEL_LIGHT_OFF_DELAY &0x7d0)|*/0x01f407d0, 0},
-{R, 1, "", PCH_PP_DIVISOR, 0x0004af06, 0},
-{W, 1, "", PCH_PP_DIVISOR, 0x0004af06, 0},
-{R, 1, "", PCH_PP_DIVISOR, 0x0004af06, 0},
-{W, 1, "", PCH_PP_DIVISOR, 0x00186906, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00020000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*8006: Write */0x80060000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x01000000, 0},
-{R, 2, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE | DP_AUX_CH_CTL_TIME_OUT_ERROR |/*[2bytes]*/0x502300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE | DP_AUX_CH_CTL_TIME_OUT_ERROR | DP_AUX_CH_CTL_RECEIVE_ERROR |/*[2bytes]*/0x522300e1, 0},
-{R, 2, "", DPA_AUX_CH_CTL, /*[2bytes]*/0x002300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY |/*[5bytes]*/0x805300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00110000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f008, 0x00000000, 0},
-{W, 1, "", 0x4f008, 0x00000001, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f008, 0x00000001, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f014, 0x00000000, 0},
-{W, 1, "", 0x4f014, 0x00000018, 0},
-{R, 1, "", 0x4f008, 0x00000001, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00110000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000300, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", 0x4f014, 0x00000018, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f030, 0x00000000, 0},
-{W, 1, "", 0x6f030, 0x7e62b020, 0},
-{R, 1, "", 0x6f034, 0x00000000, 0},
-{W, 1, "", 0x6f034, 0x00800000, 0},
-{R, 1, "", 0x6f040, 0x00000000, 0},
-{W, 1, "", 0x6f040, 0x00041cac, 0},
-{R, 1, "", 0x6f044, 0x00000000, 0},
-{W, 1, "", 0x6f044, 0x00080000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000300, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000300, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", 0x4f008, 0x00000001, 0},
-{R, 1, "", FORCEWAKE_MT_ACK, 0x40000006, 0},
-{W, 1, "", FORCEWAKE_MT_ACK, 0x40000006, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000300, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", 0x4f008, 0x00000001, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f000, 0x00000000, 0},
-{W, 1, "", 0x6f000, 0x081f077f, 0},
-{R, 1, "", 0x6f004, 0x00000000, 0},
-{W, 1, "", 0x6f004, 0x081f077f, 0},
-{R, 1, "", 0x6f008, 0x00000000, 0},
-{W, 1, "", 0x6f008, 0x07cb07ad, 0},
-{R, 1, "", 0x6f00c, 0x00000000, 0},
-{W, 1, "", 0x6f00c, 0x04570437, 0},
-{R, 1, "", 0x6f010, 0x00000000, 0},
-{W, 1, "", 0x6f010, 0x04570437, 0},
-{R, 1, "", 0x6f014, 0x00000000, 0},
-{W, 1, "", 0x6f014, 0x043d0439, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PIPEASRC, 0x00000000, 0},
-{W, 1, "", _PIPEASRC, 0x031f0257, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x7f008, 0x00000000, 0},
-{W, 1, "", 0x7f008, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _TRANSACONF, 0x00000000, 0},
-{W, 1, "", _TRANSACONF, 0x00000000, 0},
-{R, 3, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f000, 0x081f077f, 0},
-{R, 1, "", _HTOTAL_A, 0x00000000, 0},
-{W, 1, "", _HTOTAL_A, 0x081f077f, 0},
-{R, 1, "", 0x6f004, 0x081f077f, 0},
-{R, 1, "", _HBLANK_A, 0x00000000, 0},
-{W, 1, "", _HBLANK_A, 0x081f077f, 0},
-{R, 1, "", 0x6f008, 0x07cb07ad, 0},
-{R, 1, "", _HSYNC_A, 0x00000000, 0},
-{W, 1, "", _HSYNC_A, 0x07cb07ad, 0},
-{R, 1, "", 0x6f00c, 0x04570437, 0},
-{R, 1, "", _VTOTAL_A, 0x00000000, 0},
-{W, 1, "", _VTOTAL_A, 0x04570437, 0},
-{R, 1, "", 0x6f010, 0x04570437, 0},
-{R, 1, "", _VBLANK_A, 0x00000000, 0},
-{W, 1, "", _VBLANK_A, 0x04570437, 0},
-{R, 1, "", 0x6f014, 0x043d0439, 0},
-{R, 1, "", _VSYNC_A, 0x00000000, 0},
-{W, 1, "", _VSYNC_A, 0x043d0439, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000300, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", 0x4f008, 0x00000001, 0},
-{R, 1, "", 0x46100, 0xe0000000, 0},
-{W, 1, "", 0x46100, 0x20000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 3, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPACNTR, 0x00000000, 0},
-{W, 1, "", _DSPACNTR, DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x14000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{W, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", _DSPAADDR, 0x00000000, 0},
-{W, 1, "", _DSPAADDR, 0x00000000, 0},
-{R, 2, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 1, "", _DSPACNTR, DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x14000000, 0},
-{W, 1, "", _DSPACNTR, DISPLAY_PLANE_ENABLE | DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x94000000, 0},
-{R, 2, "", _DSPACNTR, DISPLAY_PLANE_ENABLE | DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x94000000, 0},
-{W, 1, "", _DSPACNTR, DISPLAY_PLANE_ENABLE | DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x94000000, 0},
-{R, 2, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{W, 1, "", DEIIR, 0x00000080, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 3, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_POS, 0x00000000, 0},
-{W, 1, "", _PFA_WIN_POS, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f050, 0x40000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PIPEASRC, 0x031f0257, 0},
-{W, 1, "", _PIPEASRC, 0x031f0257, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_POS, 0x00000000, 0},
-{W, 1, "", _PFA_WIN_POS, 0x023000f0, 0},
-{R, 4, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_CTL_1, 0x00000000, 0},
-{W, 1, "", _PFA_CTL_1, 0x80800000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_POS, 0x023000f0, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f00c, 0x04570437, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f000, 0x081f077f, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_SZ, 0x00000000, 0},
-{W, 1, "", _PFA_WIN_SZ, 0x03200258, 0},
-{R, 1, "", 0x4f014, 0x00000018, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f400, 0x00030000, 0},
-{W, 1, "", 0x6f400, 0x00030000, 0},
-{R, 1, "", 0x4f014, 0x00000018, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x7f008, 0x00000000, 0},
-{W, 1, "", 0x7f008, 0x00000000, 0},
-{R, 1, "", 0x4f014, 0x00000018, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f400, 0x00030000, 0},
-{W, 1, "", 0x6f400, 0x82034002, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x7f008, 0x00000000, 0},
-{W, 1, "", 0x7f008, 0x80000000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*4000: Write */0x40005000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x40000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*1000: Read */0x10005003, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[5bytes]*/0x405300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x0000ffff, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0xff000000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x0000ffff, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*4000: Write */0x40005000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0xff000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x04000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[5bytes]*/0x405300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*1000: Read */0x10005003, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[5bytes]*/0x405300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00ffffff, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00ffffff, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*4000: Write */0x40005000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x7e000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[5bytes]*/0x405300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*1000: Write */0x10005000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 2, "", DP_A, DP_SCRAMBLING_DISABLE_IRONLAKE | DP_SYNC_VS_HIGH |0x00000091, 0},
-{W, 1, "", DP_A, DP_SCRAMBLING_DISABLE_IRONLAKE | DP_SYNC_VS_HIGH |0x00000091, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DP_A, DP_SCRAMBLING_DISABLE_IRONLAKE | DP_SYNC_VS_HIGH |0x00000091, 0},
-{R, 1, "", 0x4f014, 0x00000018, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f410, 0x00000000, 0},
-{W, 1, "", 0x6f410, 0x00000021, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DP_A+40, 0x00000000, 0},
-{W, 1, "", DP_A+40, 0x80000011, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DP_A, DP_SCRAMBLING_DISABLE_IRONLAKE | DP_SYNC_VS_HIGH |0x00000091, 0},
-{W, 1, "", DP_A, DP_PORT_EN | DP_SCRAMBLING_DISABLE_IRONLAKE | DP_SYNC_VS_HIGH |0x80000093, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{R, 1, "", PCH_PP_ON_DELAYS, /*( PANEL_POWER_UP_DELAY &0x7d00000)|( PANEL_LIGHT_ON_DELAY &0xa)|*/0x07d0000a, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{R, 1, "", PCH_PP_ON_DELAYS, /*( PANEL_POWER_UP_DELAY &0x7d00000)|( PANEL_LIGHT_ON_DELAY &0xa)|*/0x07d0000a, 0},
-{W, 1, "", PCH_PP_ON_DELAYS, /*( PANEL_POWER_UP_DELAY &0x10000)|( PANEL_LIGHT_ON_DELAY &0xa)|*/0x0001000a, 0},
-{R, 2, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET |0xabcd000a, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET | PANEL_POWER_ON |0xabcd000b, 0},
-{R, 1, "", PCH_PP_STATUS, PP_ON | PP_SEQUENCE_POWER_UP /*| undocbit3 | undocbit0*/ |0x90000009, 0},
-{R, 1, "", PCH_PP_STATUS, PP_ON | /*undocbit3 |*/0x80000008, 0},
-{R, 1, "", PCH_PP_ON_DELAYS, /*( PANEL_POWER_UP_DELAY &0x10000)|( PANEL_LIGHT_ON_DELAY &0xa)|*/0x0001000a, 0},
-{W, 1, "", PCH_PP_ON_DELAYS, /*( PANEL_POWER_UP_DELAY &0x7d00000)|( PANEL_LIGHT_ON_DELAY &0xa)|*/0x07d0000a, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_FORCE_VDD | PANEL_POWER_RESET | PANEL_POWER_ON |0xabcd000b, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| PANEL_POWER_RESET | PANEL_POWER_ON |0xabcd0003, 0},
-{R, 1, "", 0x4f008, 0x00000001, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*8001: Write */0x80010000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x0a000080, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9000: Write */0x90000200, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00020000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DP_A, DP_PORT_EN | DP_SYNC_VS_HIGH |0x80000013, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00020000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*8001: Write */0x80010100, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x02000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{R, 1, "", DP_A+0x40, 0x80000000, 0},
-{W, 1, "", DP_A+0x40, 0x80000000, 0},
-{R, 1, "", DP_A, DP_PORT_EN | DP_SYNC_VS_HIGH |0x80000013, 0},
-{W, 1, "", DP_A, DP_PORT_EN | DP_SYNC_VS_HIGH |0x80000013, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9001: Write */0x90010200, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*8001: Write */0x80010200, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x01000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9001: Write */0x90010100, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00020000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00020000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*8001: Read */0x80010301, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[6bytes]*/0xc06300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9002: Read */0x90020201, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[3bytes]*/0x403300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00110000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DP_A+0x40, 0x80000000, 0},
-{W, 1, "", DP_A+0x40, 0x80000100, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00110000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9001: Write */0x90010200, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[3bytes]*/0x403300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00010000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00010000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*8001: Write */0x80010200, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x02000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9002: Read */0x90020201, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[3bytes]*/0x403300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00770000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00770000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9002: Write Recv len*/0x90020400, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[3bytes]*/0x403300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00810000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00810000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*9001: Write */0x90010200, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[4bytes]*/0xc04300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{R, 2, "", DPA_AUX_CH_DATA1, 0x00020000, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00020000, 0},
-{W, 1, "", DPA_AUX_CH_DATA1, /*8001: Write */0x80010200, 0},
-{R, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{W, 1, "", DPA_AUX_CH_DATA2, 0x00000000, 0},
-{R, 3, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[2bytes]*/0x402300e1, 0},
-{W, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE |/*[5bytes]*/0xc05300e1, 0},
-{R, 1, "", DPA_AUX_CH_CTL, DP_AUX_CH_CTL_DONE |/*[1bytes]*/0x401300e1, 0},
-{R, 1, "", DPA_AUX_CH_DATA1, 0x00000000, 0},
-{R, 1, "", DP_A+0x40, 0x80000100, 0},
-{W, 1, "", DP_A+0x40, 0x80000200, 0},
-{R, 1, "", DP_A+0x40, 0x80000200, 0},
-{W, 1, "", DP_A+0x40, 0x80000300, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", BLC_PWM_CPU_CTL2, PWM_PIPE_B |0x60000000, 0},
-{W, 1, "", BLC_PWM_CPU_CTL2, PWM_ENABLE |0x80000000, 0},
-{R, 1, "", BLC_PWM_PCH_CTL1, 0x00000000, 0},
-{W, 1, "", BLC_PWM_PCH_CTL1, PWM_PCH_ENABLE |0x80000000, 0},
-{R, 2, "", BLC_PWM_CPU_CTL, 0x03a903a9, 0},
-{W, 1, "", BLC_PWM_CPU_CTL, 0x03a903a9, 0},
-{R, 1, "", BLC_PWM_CPU_CTL, 0x03a903a9, 0},
-{W, 1, "", BLC_PWM_CPU_CTL, 0x03a903a9, 0},
-{R, 1, "", BLC_PWM_PCH_CTL2, 0x03a903a9, 0},
-{W, 1, "", BLC_PWM_PCH_CTL2, 0x03a903a9, 0},
-{R, 1, "", BLC_PWM_PCH_CTL1, PWM_PCH_ENABLE |0x80000000, 0},
-{W, 1, "", BLC_PWM_PCH_CTL1, PWM_PCH_ENABLE |0x80000000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| PANEL_POWER_RESET | PANEL_POWER_ON |0xabcd0003, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0xabcd0007, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0xabcd0007, 0},
-{W, 1, "", PCH_PP_CONTROL, EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0x00000007, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 2, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", PCH_PP_CONTROL, EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0x00000007, 0},
-{W, 1, "", PCH_PP_CONTROL, EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0x00000007, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", SDEISR+0x30, PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |0x10001010, 0},
-{W, 1, "", SDEISR+0x30, PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |0x10001010, 0},
-{R, 2, "", DIGITAL_PORT_HOTPLUG_CNTRL, DIGITAL_PORTA_HOTPLUG_ENABLE | DIGITAL_PORTA_LONG_PULSE_DETECT_MASK |0x00000012, 0},
-{W, 1, "", DIGITAL_PORT_HOTPLUG_CNTRL, DIGITAL_PORTA_HOTPLUG_ENABLE | DIGITAL_PORTA_LONG_PULSE_DETECT_MASK |0x00000012, 0},
-{R, 2, "", SDEIIR, 0x00000000, 0},
-{W, 1, "", SDEIIR, 0x00000000, 0},
-{R, 1, "", SDEIIR, 0x00000000, 0},
-{W, 1, "", SDEIIR, 0x00000000, 0},
-{R, 2, "", DEIIR, 0x00000000, 0},
-{W, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 1, "", 0x45400, 0xc0000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
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-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 1, "", 0x45400, 0xc0000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 1, "", 0x45400, 0xc0000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 3, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 3, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 3, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 3, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 1, "", 0x45400, 0xc0000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 2, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 1, "", 0x45400, 0xc0000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f000, 0x02580320, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 3, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 5, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 3, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f000, 0x02580320, 0},
-{W, 1, "", 0x4f000, 0x02580320, 0},
-{R, 2, "", 0x45400, 0xc0000000, 0},
-{W, 1, "", 0x45400, 0x80000000, 0},
-{R, 1, "", 0x45400, 0xc0000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f000, 0x02580320, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f054, 0x0000420c, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 3, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{W, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{W, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f000, 0x02580320, 0},
-{W, 1, "", 0x4f000, 0x02580320, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 2, "", CPU_VGACNTRL, 0x8000298e, 0},
-{W, 1, "", CPU_VGACNTRL, 0x8000298e, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 2, "", _CURACNTR, 0x00000000, 0},
-{W, 1, "", _CURACNTR, 0x00000000, 0},
-{R, 2, "", _CURABASE, 0x00000000, 0},
-{W, 1, "", _CURABASE, 0x00000000, 0},
-{R, 1, "", _DSPACNTR, DISPLAY_PLANE_ENABLE | DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x94000000, 0},
-{W, 1, "", _DSPACNTR, 0x00000000, 0},
-{R, 2, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000400, 0},
-{R, 2, "", _CURBCNTR_IVB, 0x00000000, 0},
-{W, 1, "", _CURBCNTR_IVB, 0x00000000, 0},
-{R, 2, "", _CURBBASE_IVB, 0x00000000, 0},
-{W, 1, "", _CURBBASE_IVB, 0x00000000, 0},
-{R, 1, "", _DSPBCNTR, 0x00000000, 0},
-{W, 1, "", _DSPBCNTR, 0x00000000, 0},
-{R, 2, "", _DSPBSURF, 0x00000000, 0},
-{W, 1, "", _DSPBSURF, 0x00000000, 0},
-{R, 1, "", 0x72080, 0x00000000, 0},
-{W, 1, "", 0x72080, 0x00000000, 0},
-{R, 2, "", 0x72084, 0x00000000, 0},
-{W, 1, "", 0x72084, 0x00000000, 0},
-{R, 1, "", _DVSACNTR, 0x00000000, 0},
-{W, 1, "", _DVSACNTR, 0x00000000, 0},
-{R, 2, "", _DVSASURF, 0x00000000, 0},
-{W, 1, "", _DVSASURF, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{W, 1, "", DEIIR, 0x00008000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000400, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f400, 0x82034002, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x7f008, 0xc0000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", PCH_PP_CONTROL, EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0x00000007, 0},
-{W, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0xabcd0007, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 3, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x61400, 0x00030000, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 3, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", _PIPEBCONF, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{W, 1, "", 0x4f044, 0x00000600, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 2, "", 0x4f044, 0x00000600, 0},
-{R, 1, "", 0x62400, 0x00030000, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 2, "", 0x4f044, 0x00000600, 0},
-{R, 1, "", 0x72008, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000600, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{W, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f05c, 0x00000008, 0},
-{W, 1, "", 0x4f05c, 0x00000008, 0},
-{R, 1, "", 0x4f060, 0x00000008, 0},
-{W, 1, "", 0x4f060, 0x00000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", CPU_VGACNTRL, 0x8000298e, 0},
-{W, 1, "", CPU_VGACNTRL, 0x8020298e, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{W, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", _DSPAADDR, 0x00000000, 0},
-{W, 1, "", _DSPAADDR, 0x00000000, 0},
-{R, 2, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x7f008, 0xc0000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPACNTR, 0x00000000, 0},
-{W, 1, "", _DSPACNTR, 0x00000000, 0},
-{R, 2, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_POS, 0x023000f0, 0},
-{W, 1, "", _PFA_WIN_POS, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_SZ, 0x03200258, 0},
-{W, 1, "", _PFA_WIN_SZ, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PIPEASRC, 0x031f0257, 0},
-{W, 1, "", _PIPEASRC, 0x031f0257, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_POS, 0x00000000, 0},
-{W, 1, "", _PFA_WIN_POS, 0x00000000, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f050, 0x40000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PIPEASRC, 0x031f0257, 0},
-{W, 1, "", _PIPEASRC, 0x031f0257, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_POS, 0x00000000, 0},
-{W, 1, "", _PFA_WIN_POS, 0x023000f0, 0},
-{R, 4, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_CTL_1, 0x80800000, 0},
-{W, 1, "", _PFA_CTL_1, 0x80800000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_POS, 0x023000f0, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f00c, 0x04570437, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x6f000, 0x081f077f, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _PFA_WIN_SZ, 0x00000000, 0},
-{W, 1, "", _PFA_WIN_SZ, 0x03200258, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{W, 1, "", DEIIR, 0x00000080, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", DEIIR, 0x00000000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 3, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPACNTR, 0x00000000, 0},
-{W, 1, "", _DSPACNTR, DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x14000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f048, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{W, 1, "", _DSPASTRIDE, 0x00000640, 0},
-{R, 1, "", _DSPAADDR, 0x00000000, 0},
-{W, 1, "", _DSPAADDR, 0x00000000, 0},
-{R, 2, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 1, "", _DSPACNTR, DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x14000000, 0},
-{W, 1, "", _DSPACNTR, DISPLAY_PLANE_ENABLE | DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x94000000, 0},
-{R, 2, "", _DSPACNTR, DISPLAY_PLANE_ENABLE | DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x94000000, 0},
-{W, 1, "", _DSPACNTR, DISPLAY_PLANE_ENABLE | DISPPLANE_15_16BPP |( DISPPLANE_16BPP &0x4000000)|0x94000000, 0},
-{R, 2, "", _DSPASIZE+0xc, 0x00000000, 0},
-{W, 1, "", _DSPASIZE+0xc, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f040, 0x01000008, 0},
-{R, 2, "", 0x4f044, 0x00000400, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000400, 0},
-{W, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", PCH_PP_CONTROL, (PCH_PP_UNLOCK&0xabcd0000)| EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0xabcd0007, 0},
-{W, 1, "", PCH_PP_CONTROL, EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0x00000007, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 2, "", SDEISR+30, PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |0x10001010, 0},
-{W, 1, "", SDEISR+30, PORTC_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |0x10001010, 0},
-{R, 2, "", DIGITAL_PORT_HOTPLUG_CNTRL, DIGITAL_PORTA_HOTPLUG_ENABLE |0x00000010, 0},
-{W, 1, "", DIGITAL_PORT_HOTPLUG_CNTRL, DIGITAL_PORTA_HOTPLUG_ENABLE |0x00000010, 0},
-{R, 2, "", SDEIIR, 0x00000000, 0},
-{W, 1, "", SDEIIR, 0x00000000, 0},
-{R, 1, "", SDEIIR, 0x00000000, 0},
-{W, 1, "", SDEIIR, 0x00000000, 0},
-{R, 2, "", DEIIR, 0x00000000, 0},
-{W, 1, "", DEIIR, 0x00000000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{R, 1, "", 0x4f04c, 0x43430000, 0},
-{R, 1, "", 0x4f044, 0x00000000, 0},
-{W, 1, "", 0x4f044, 0x00001800, 0},
- {I,},
-};
-
-int niodefs = sizeof (iodefs) / sizeof (iodefs[0]);
diff --git a/src/mainboard/intel/wtm2/i915io.h b/src/mainboard/intel/wtm2/i915io.h
index 2277188..52842ad 100644
--- a/src/mainboard/intel/wtm2/i915io.h
+++ b/src/mainboard/intel/wtm2/i915io.h
@@ -18,71 +18,59 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include "i915_reg.h"
-#include "drm_dp_helper.h"
+#include <northbridge/intel/haswell/i915_reg.h>
+#include <northbridge/intel/haswell/drm_dp_helper.h>
/* things that are, strangely, not defined anywhere? */
-#define PCH_PP_UNLOCK 0xabcd0000
-#define WMx_LP_SR_EN (1<<31)
+#define PCH_PP_UNLOCK 0xabcd0000
+#define WMx_LP_SR_EN (1<<31)
+#define PRB0_TAIL 0x02030
+#define PRB0_HEAD 0x02034
+#define PRB0_START 0x02038
+#define PRB0_CTL 0x0203c
-/* Google Link-specific defines */
+
+/* mainboard-specific defines */
+/* how many bytes do we need for the framebuffer?
+ * Well, this gets messy. To get an exact answer, we have
+ * to ask the panel, but we'd rather zero the memory
+ * and set up the gtt while the panel powers up. So,
+ * we take a reasonable guess, secure in the knowledge that the
+ * MRC has to overestimate the number of bytes used.
+ * 8 MiB is a very safe guess. There may be a better way later, but
+ * fact is, the initial framebuffer is only very temporary. And taking
+ * a little long is ok; this is done much faster than the AUX
+ * channel is ready for IO.
+ */
+#define FRAME_BUFFER_BYTES (8*MiB)
/* how many 4096-byte pages do we need for the framebuffer?
- * There are 32 bits per pixel, or 4 bytes,
- * which means 1024 pixels per page.
- * HencetThere are 4250 GTTs on Link:
- * 2650 (X) * 1700 (Y) pixels / 1024 pixels per page.
+ * There are hard ways to get this, and easy ways:
+ * there are FRAME_BUFFER_BYTES/4096 pages, since pages are 4096
+ * on this chip.
*/
-#define FRAME_BUFFER_PAGES ((2560*1700)/1024)
-#define FRAME_BUFFER_BYTES (FRAME_BUFFER_PAGES*4096)
+#define FRAME_BUFFER_PAGES (FRAME_BUFFER_BYTES/(4096))
-/* One-letter commands for code not mean to be ready for humans.
- * The code was generated by a set of programs/scripts.
- * M print out a kernel message
- * R read a register. We do these mainly to ensure that if hardware wanted
- * the register read, it was read; also, in debug, we can see what was expected
- * and what was found. This has proven *very* useful to get this debugged.
- * The udelay, if non-zero, will make sure there is a
- * udelay() call with the value.
- * The count is from the kernel and tells us how many times this read was done.
- * Also useful for debugging and the state
- * machine uses the info to drive a poll.
- * W Write a register
- * V set verbosity. It's a bit mask.
- * 0 -> nothing
- * 1 -> print kernel messages
- * 2 -> print IO ops
- * 4 -> print the number of times we spin on a register in a poll
- * 8 -> restore whatever the previous verbosity level was
- * (only one deep stack)
- *
- * Again, this is not really meant for human consumption. There is not a poll
- * operator as such because, sometimes, there is a read/write/read where the
- * second read is a poll, and this chipset is so touchy I'm reluctant to move
- * things around and/or delete too many reads.
+
+/* debug enums. These are for printks that, due to their place in the
+ * middle of graphics device IO, might change timing. Use with care
+ * or not at all.
*/
-#define M 1
-#define R 2
-#define W 4
-#define V 8
-#define I 16
-#define P 32
-
-struct iodef {
- unsigned char op;
- unsigned int count;
- const char *msg;
- unsigned long addr;
- unsigned long data;
- unsigned long udelay;
+enum {
+ vio = 2, /* dump every IO */
+ vspin = 4, /* print # of times we spun on a register value */
};
/* i915.c */
unsigned long io_i915_READ32(unsigned long addr);
void io_i915_WRITE32(unsigned long val, unsigned long addr);
+int vbe_mode_info_valid(void);
+void fill_lb_framebuffer(struct lb_framebuffer *framebuffer);
/* intel_dp.c */
u32 pack_aux(u32 *src, int src_bytes);
-void unpack_aux(u32 src, u32 *dst, int dst_bytes);
+void unpack_aux(u32 src, u8 *dst, int dst_bytes);
int intel_dp_aux_ch(u32 ch_ctl, u32 ch_data, u32 *send, int send_bytes,
- u32 *recv, int recv_size);
+ u8 *recv, int recv_size);
+/* i915io.c */
+void graphics_register_reset(u32 aux_ctl, u32 aux_data, int verbose);
diff --git a/src/mainboard/intel/wtm2/intel_dp.c b/src/mainboard/intel/wtm2/intel_dp.c
index b864313..8fac6f8 100644
--- a/src/mainboard/intel/wtm2/intel_dp.c
+++ b/src/mainboard/intel/wtm2/intel_dp.c
@@ -47,9 +47,8 @@
}
void
-unpack_aux(u32 src, u32 *dst32, int dst_bytes)
+unpack_aux(u32 src, u8 *dst, int dst_bytes)
{
- u8 *dst = (u8 *)dst32;
int i;
if (dst_bytes > 4)
@@ -60,7 +59,7 @@
int
intel_dp_aux_ch(u32 ch_ctl, u32 ch_data, u32 *send, int send_bytes,
- u32 *recv, int recv_size)
+ u8 *recv, int recv_size)
{
int i;
int recv_bytes;
diff --git a/src/mainboard/intel/wtm2/drm_dp_helper.h b/src/northbridge/intel/haswell/drm_dp_helper.h
similarity index 100%
rename from src/mainboard/intel/wtm2/drm_dp_helper.h
rename to src/northbridge/intel/haswell/drm_dp_helper.h
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index dd06867..e577fb5 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2011 Chromium OS Authors
+ * Copyright 2012 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -189,6 +189,7 @@
static void gma_func0_init(struct device *dev)
{
+ int lightup_ok = 0;
u32 reg32;
u32 graphics_base; //, graphics_size;
/* IGD needs to be Bus Master */
@@ -205,14 +206,6 @@
/* Init graphics power management */
gma_pm_init_pre_vbios(dev);
- /* PCI Init, will run VBIOS */
-#if !CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
- printk(BIOS_SPEW, "Run the VBIOS init\n");
- pci_dev_init(dev);
-#endif
-
- /* Post VBIOS init */
- gma_pm_init_post_vbios(dev);
#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
printk(BIOS_SPEW, "NATIVE graphics, run native enable\n");
u32 iobase, mmiobase, physbase;
@@ -221,8 +214,15 @@
physbase = pci_read_config32(dev, 0x5c) & ~0xf;
int i915lightup(u32 physbase, u32 iobase, u32 mmiobase, u32 gfx);
- i915lightup(physbase, iobase, mmiobase, graphics_base);
+ lightup_ok = i915lightup(physbase, iobase, mmiobase, graphics_base);
#endif
+ if (! lightup_ok) {
+ printk(BIOS_SPEW, "FUI did not run; using VBIOS\n");
+ pci_dev_init(dev);
+ }
+
+ /* Post VBIOS init */
+ gma_pm_init_post_vbios(dev);
}
static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
diff --git a/src/mainboard/intel/wtm2/i915_reg.h b/src/northbridge/intel/haswell/i915_reg.h
similarity index 100%
rename from src/mainboard/intel/wtm2/i915_reg.h
rename to src/northbridge/intel/haswell/i915_reg.h