tree c160fb10e2440680b383741b1d3d96f5ee93fcba
parent 5f0c3a6ae23df47287d57123eb8d9660416a0cc9
author Matt DeVillier <matt.devillier@gmail.com> 1718074466 -0500
committer Felix Held <felix-coreboot@felixheld.de> 1718279268 +0000

soc/intel/apollolake: Add SoC-specific microcode update check for GLK

While both APL and GLK load the CPU microcode from FIT, only GLK
supports the PRMRR/SGX feature. When this feature is supported, the
FIT microcode load will set the msr (0x08b) with the patch id/revision
one less than the revision in the microcode binary. This results in
coreboot attempting (and failing) to reload the microcode again in
ramstage. Avoid the microcode reload attempt for GLK by using a SoC-
specific microcode update check which accounts for the off-by-1 when
comparing versions.

Implementation is based on the one used for SKL and CNL, but modified
based on feedback in comments on Gerrit.

TEST=build/boot google/reef (electro) and google/octopus (ampton),
verify in cbmem console log that CPU microcode update in ramstage is
skipped due to already being up to date, and that GLK uses the
SoC-specific check and APL uses the non-specific/general one.

Change-Id: Iab97f23d4388d5057797bb13f585db821c735bd0
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83037
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>