tree 98ae9b9df1563d37bb3c6c252f9f133c751570a6
parent b44a388821fd5d75c9a86dae75dec23802da07d0
author Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> 1709018130 +0900
committer Eric Lai <ericllai@google.com> 1709521050 +0000

mb/google/brya/var/xol: Update NVMe clock source index to 0

Change ClkSrc index for NVME to 0 from 1 by referring to proto2
schematics.

BUG=b:326481458
BRANCH=firmware-brya-14505.B
TEST=FW_NAME=xol emerge-brya coreboot chromeos-bootimage

Change-Id: I7ea1cd7d8e16d4cee953e931d2f1829eae7d1978
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80768
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>