Rename ECAM-specific MMCONF Kconfigs
Currently, the MMCONF Kconfigs only support the Enhanced Configuration
Access mechanism (ECAM) method for accessing the PCI config address
space. Some platforms have a different way of mapping the PCI config
space to memory. This patch renames the following configs to
make it clear that these configs are ECAM-specific:
- NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT
- MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT
- MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS
- MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER
- MMCONF_LENGTH --> ECAM_MMCONF_LENGTH
Please refer to CB:57861 "Proposed coreboot Changes" for more
details.
BUG=b:181098581
BRANCH=None
TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max
Make sure Jenkins verifies that builds on other boards
Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/soc/amd/cezanne/acpi/pci0.asl b/src/soc/amd/cezanne/acpi/pci0.asl
index f9956b6..08ccbe6 100644
--- a/src/soc/amd/cezanne/acpi/pci0.asl
+++ b/src/soc/amd/cezanne/acpi/pci0.asl
@@ -66,14 +66,14 @@
/* Declare memory between TOM1 and MMCONF as available for PCI MMIO. */
MM1B = TOM1
- Local0 = CONFIG_MMCONF_BASE_ADDRESS
+ Local0 = CONFIG_ECAM_MMCONF_BASE_ADDRESS
Local0 -= TOM1
MM1L = Local0
CreateWordField(CRES, ^PSB0._MAX, BMAX)
CreateWordField(CRES, ^PSB0._LEN, BLEN)
- BMAX = CONFIG_MMCONF_BUS_NUMBER - 1
- BLEN = CONFIG_MMCONF_BUS_NUMBER
+ BMAX = CONFIG_ECAM_MMCONF_BUS_NUMBER - 1
+ BLEN = CONFIG_ECAM_MMCONF_BUS_NUMBER
Return(CRES) /* note to change the Name buffer */
} /* end of Method(_SB.PCI0._CRS) */