diff --git a/src/northbridge/intel/ironlake/bootblock.c b/src/northbridge/intel/ironlake/bootblock.c
index 241eb43..58f49da 100644
--- a/src/northbridge/intel/ironlake/bootblock.c
+++ b/src/northbridge/intel/ironlake/bootblock.c
@@ -10,7 +10,7 @@
 static uint32_t encode_pciexbar_length(void)
 {
 	/* NOTE: Ironlake uses a different encoding for the PCIEXBAR length field */
-	switch (CONFIG_MMCONF_BUS_NUMBER) {
+	switch (CONFIG_ECAM_MMCONF_BUS_NUMBER) {
 		case 256: return 0 << 1;
 		case 128: return 6 << 1;
 		case  64: return 7 << 1;
@@ -27,7 +27,7 @@
 	 */
 	const pci_devfn_t qpi_sad = PCI_DEV(255, 0, 1);
 
-	const uint32_t reg32 = CONFIG_MMCONF_BASE_ADDRESS | encode_pciexbar_length() | 1;
+	const uint32_t reg32 = CONFIG_ECAM_MMCONF_BASE_ADDRESS | encode_pciexbar_length() | 1;
 	pci_io_write_config32(qpi_sad, SAD_PCIEXBAR + 4, 0);
 	pci_io_write_config32(qpi_sad, SAD_PCIEXBAR, reg32);
 }