soc/amd/genoa/include/amd_pci_int_defs: rename PIRQ index 0x60 and 0x61
PIRQ_SCI is already defined as 0x10 and this also brings the definitions
more in line with Phoenix.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib2ab954b379d2edd0167d7fb229557600cbc4e48
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79462
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
diff --git a/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h b/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h
index 7d2bb39..b99ee41 100644
--- a/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h
+++ b/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h
@@ -38,8 +38,8 @@
#define PIRQ_GPP2 0x52 /* GPPInt2 */
#define PIRQ_GPP3 0x53 /* GPPInt3 */
/* 0x54-0x59 reserved */
-#define PIRQ_SCI 0x60 /* SCI Interrupt */
-#define PIRQ_SMI 0x61 /* SMI Interrupt */
+#define PIRQ_GSCI 0x60 /* SCI Interrupt */
+#define PIRQ_GSMI 0x61 /* SMI Interrupt */
#define PIRQ_GPIO 0x62 /* GPIO Interrupt */
/* 0x63-0x6f reserved */
#define PIRQ_I2C0 0x70 /* I2C0/I3C0 */