| commit | 4e3d2a16ff532cbb8dfe4ea5eda56a7c23e65f67 | [log] [tgz] |
|---|---|---|
| author | Felix Held <felix-coreboot@felixheld.de> | Thu Feb 22 16:40:07 2024 +0100 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Fri Feb 23 16:44:01 2024 +0000 |
| tree | 8a6236726303eeadfb95cbbdeac6015dc9e0f1d1 | |
| parent | b9e80df84e132b8b3c57226ce7eafd3bfd17a2b7 [diff] |
vc/amd/opensil/genoa_poc/mpio/chip: fix typo in pcie_aspm enum name Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I60ac259d2aa0bd500063a5c841ba33e576e022f7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80702 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h index 2ef3e8b..64a8b3e 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h +++ b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h
@@ -43,7 +43,7 @@ }; /* Sync with PCIE_ASPM_TYPE */ -enum pcie_asmp { +enum pcie_aspm { aspm_disabled, L0s, L1, @@ -57,7 +57,7 @@ uint8_t gpio_group; enum mpio_hotplug hotplug; enum pcie_link_speed speed; - enum pcie_asmp aspm; + enum pcie_aspm aspm; uint8_t aspm_l1_1 : 1; uint8_t aspm_l1_2 : 1; uint8_t clock_pm : 1;