diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c
index b1a51c6..65af02a 100644
--- a/src/southbridge/intel/i82371eb/smbus.c
+++ b/src/southbridge/intel/i82371eb/smbus.c
@@ -31,6 +31,11 @@
 #include "i82371eb.h"
 #include "smbus.h"
 
+#if CONFIG_HAVE_ACPI_RESUME == 1
+extern u8 acpi_slp_type;
+int acpi_get_sleep_type(void);
+#endif
+
 static void pwrmgt_enable(struct device *dev)
 {
 	struct southbridge_intel_i82371eb_config *sb = dev->chip_info;
@@ -87,7 +92,13 @@
 	outw(0xffff,     DEFAULT_PMBASE + GLBSTS);
 	outl(0xffffffff, DEFAULT_PMBASE + DEVSTS);
 
-	/* set pmcntrl default */
+#if CONFIG_HAVE_ACPI_RESUME == 1
+	/* this reads PMCNTRL, so we have to call it before writing the
+	 * default value */
+	acpi_slp_type = acpi_get_sleep_type();
+#endif
+
+	/* set PMCNTRL default */
 	outw(SUS_TYP_S0|SCI_EN, DEFAULT_PMBASE + PMCNTRL);
 }