mb/emulation/qemu-q35: Support PARALLEL_MP with SMM_ASEG

Tested with SMI_DEBUG: SMM prints things on the console.

Change-Id: I7db55aaabd16a6ef585c4802218790bf04650b13
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
index 73aadfb..868009c 100644
--- a/src/cpu/qemu-x86/Kconfig
+++ b/src/cpu/qemu-x86/Kconfig
@@ -10,7 +10,6 @@
 
 if CPU_QEMU_X86
 
-# coreboot i440fx does not support SMM
 choice
 	prompt "AP init"
 	default CPU_QEMU_X86_LAPIC_INIT
@@ -24,6 +23,7 @@
 
 endchoice
 
+# coreboot i440fx does not support SMM
 choice
 	prompt "SMM support"
 	default CPU_QEMU_X86_ASEG_SMM
@@ -35,7 +35,6 @@
 
 config CPU_QEMU_X86_ASEG_SMM
 	bool "SMM in ASEG"
-	depends on CPU_QEMU_X86_LAPIC_INIT
 	select SMM_ASEG
 
 config CPU_QEMU_X86_TSEG_SMM
diff --git a/src/include/cpu/intel/smm_reloc.h b/src/include/cpu/intel/smm_reloc.h
index 126aa2a..3d95efc 100644
--- a/src/include/cpu/intel/smm_reloc.h
+++ b/src/include/cpu/intel/smm_reloc.h
@@ -36,6 +36,7 @@
 /* These helpers are for performing SMM relocation. */
 void northbridge_write_smram(u8 smram);
 
+void smm_open_aseg(void);
 void smm_lock(void);
 void smm_relocate(void);
 
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c
index 06aa83a..b55ace0 100644
--- a/src/mainboard/emulation/qemu-i440fx/northbridge.c
+++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c
@@ -247,7 +247,7 @@
 
 void mp_init_cpus(struct bus *cpu_bus)
 {
-	const struct mp_ops *ops = CONFIG(SMM_TSEG) ? &mp_ops_with_smm : &mp_ops_no_smm;
+	const struct mp_ops *ops = CONFIG(NO_SMM) ? &mp_ops_no_smm : &mp_ops_with_smm;
 
 	/* TODO: Handle mp_init_with_smm failure? */
 	mp_init_with_smm(cpu_bus, ops);
diff --git a/src/mainboard/emulation/qemu-q35/cpu.c b/src/mainboard/emulation/qemu-q35/cpu.c
index fb31fc5..fe3a571 100644
--- a/src/mainboard/emulation/qemu-q35/cpu.c
+++ b/src/mainboard/emulation/qemu-q35/cpu.c
@@ -12,7 +12,14 @@
 {
 	printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
 
-	smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
+	if (CONFIG(SMM_TSEG))
+		smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
+
+	if (CONFIG(SMM_ASEG)) {
+		smm_open_aseg();
+		*perm_smbase = 0xa0000;
+		*perm_smsize = 0x10000;
+	}
 
 	/* FIXME: on X86_64 the save state size is smaller than the size of the SMM stub */
 	*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
diff --git a/src/mainboard/emulation/qemu-q35/memmap.c b/src/mainboard/emulation/qemu-q35/memmap.c
index 7d5180e..e73e0df 100644
--- a/src/mainboard/emulation/qemu-q35/memmap.c
+++ b/src/mainboard/emulation/qemu-q35/memmap.c
@@ -78,6 +78,12 @@
 	 */
 	printk(BIOS_DEBUG, "Locking SMM.\n");
 
-	pci_or_config8(PCI_DEV(0, 0, 0), ESMRAMC, T_EN);
+	if (CONFIG(SMM_TSEG))
+		pci_or_config8(PCI_DEV(0, 0, 0), ESMRAMC, T_EN);
 	pci_write_config8(PCI_DEV(0, 0, 0), SMRAMC, D_LCK | G_SMRAME | C_BASE_SEG);
 }
+
+void smm_open_aseg(void)
+{
+	pci_write_config8(PCI_DEV(0, 0, 0), SMRAMC, G_SMRAME | C_BASE_SEG | D_OPEN);
+}