arch/riscv: Set the stack pointer upon trap entry

Change-Id: I52fae62bc6cf775179963720fbcfaa9e07f6a717
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16017
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S
index 82a5629..5ee0fdd 100644
--- a/src/arch/riscv/trap_util.S
+++ b/src/arch/riscv/trap_util.S
@@ -116,7 +116,17 @@
     .global  trap_entry
 trap_entry:
   csrw mscratch, sp
-  1:addi sp,sp,-320
+
+  # SMP isn't supported yet, to avoid overwriting the same stack with different
+  # harts that handle traps at the same time.
+  csrr sp, mhartid
+.Lsmp_hang:
+  bnez sp, .Lsmp_hang
+
+  # TODO: Use the old stack pointer (plus an offset) for exceptions in machine
+  # mode, to avoid overwriting stack data.
+  li sp, 0x8000fff0
+
   save_tf
   move  a0,sp
   jal trap_handler