soc/intel/skylake: Enable SA IMGU depending on devicetree configuration
Currently, SA IMGU gets enabled by the option SaImguEnable,
but this duplicates the devicetree on/off options. Therefore, depend on
the devicetree for the enablement of the SA IMGU controller.
All corresponding mainboards were checked if the devicetree
configuration matches the SaImguEnable setting, and missing entries
were added.
Change-Id: I293a20a321c75f82a57cbd5339656d93509b7aa6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index cb0d2fc..80e89f6 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -230,7 +230,9 @@
sizeof(params->SerialIoDevMode));
params->PchCio2Enable = config->Cio2Enable;
- params->SaImguEnable = config->SaImguEnable;
+
+ dev = pcidev_path_on_root(SA_DEVFN_IMGU);
+ params->SaImguEnable = dev && dev->enabled;
dev = pcidev_path_on_root(PCH_DEVFN_CSE_3);
params->Heci3Enabled = dev ? dev->enabled : 0;
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 404a9f4..33fe52c 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -302,7 +302,6 @@
/* Camera */
u8 Cio2Enable;
- u8 SaImguEnable;
/* eMMC and SD */
u8 ScsEmmcHs400Enabled;