nb/intel/sandybridge: assign host bridge ops in chipset devicetree
Since the host bridge is always function 0 of device 0 on bus 0, the
device operations can be statically assigned in the devicetree and
there's no need to bind the host bridge device operations to the PCI
device during runtime via a list of PCI IDs.
TEST=Lenovo X220 still boots to Linux
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Change-Id: Icf3d9f8cd2be2f8ef71fd9fdb5f005f3b683332e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79113
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
diff --git a/src/northbridge/intel/sandybridge/chipset.cb b/src/northbridge/intel/sandybridge/chipset.cb
index 5635ca6..9fb1701 100644
--- a/src/northbridge/intel/sandybridge/chipset.cb
+++ b/src/northbridge/intel/sandybridge/chipset.cb
@@ -10,7 +10,7 @@
end
device domain 0 on
ops sandybridge_pci_domain_ops
- device pci 00.0 alias host_bridge on end # host bridge
+ device pci 00.0 alias host_bridge on ops sandybridge_host_bridge_ops end
device pci 01.0 alias peg10 off end # PEG10
device pci 01.1 alias peg11 off end # PEG11
device pci 01.2 alias peg12 off end # PEG12