cpu: Fix spelling
Change-Id: I69c46648de0689e9bed84c7726906024ad65e769
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/3729
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 056b289..85f6afd 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -39,7 +39,7 @@
#include "chip.h"
/*
- * List of suported C-states in this processor
+ * List of supported C-states in this processor
*
* Latencies are typical worst-case package exit time in uS
* taken from the SandyBridge BIOS specification.
@@ -324,7 +324,7 @@
return;
conf = lapic->chip_info;
- /* Set TCC activaiton offset if supported */
+ /* Set TCC activation offset if supported */
msr = rdmsr(MSR_PLATFORM_INFO);
if ((msr.lo & (1 << 30)) && conf->tcc_offset) {
msr = rdmsr(MSR_TEMPERATURE_TARGET);
@@ -508,8 +508,8 @@
int num_aps;
const void *microcode_patch;
- /* Perform any necesarry BSP initialization before APs are brought up.
- * This call alos allows the BSP to prepare for any secondary effects
+ /* Perform any necessary BSP initialization before APs are brought up.
+ * This call also allows the BSP to prepare for any secondary effects
* from calling cpu_initialize() such as smm_init(). */
bsp_init_before_ap_bringup(cpu_bus);
@@ -529,7 +529,7 @@
}
if (smm_initialize()) {
- printk(BIOS_CRIT, "SMM Initialiazation failed...\n");
+ printk(BIOS_CRIT, "SMM Initialization failed...\n");
return;
}