arm64: xcompile: Add support for A53 erratum 843419
This patch adds support to enable a linker workaround to a hardware
erratum on some early Cortex-A53 revisions. Since the linker option was
added very recently, we use xcompile to test whether the toolchain
supports it first. It is also guarded by a Kconfig since only a few
ARM64 SoCs will need this and it incurs a performance penalty.
BRANCH=none
BUG=none
TEST=Turned it on or off for Smaug and confirmed that it (dis)appeared
in verbose make output accordingly.
Change-Id: I01c9642d3cf489134645f0db6f79f1c788ddb00d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 57128785760c4dfa32d6e6d764756443a9323cb7
Original-Change-Id: Ia5dd124f484e38460d75fb864304e7e8b18d16b7
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/294745
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11403
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
diff --git a/payloads/libpayload/arch/arm64/Kconfig b/payloads/libpayload/arch/arm64/Kconfig
index d2f8e56..a28a1f2 100644
--- a/payloads/libpayload/arch/arm64/Kconfig
+++ b/payloads/libpayload/arch/arm64/Kconfig
@@ -33,6 +33,14 @@
def_bool y
select LITTLE_ENDIAN
+config ARM64_A53_ERRATUM_843419
+ bool "Enable Cortex-A53 erratum 843419 linker workaround"
+ default n
+ help
+ Some early Cortex-A53 revisions had a hardware bug that results in
+ incorrect address calculations in rare cases. This option enables a
+ linker workaround to avoid those cases if your toolchain supports it.
+
config DMA_LIM_EXCL
hex "DMA address limit(exclusive) in MiB units"
default 0x1000