AGESA: Use pcidev_on_root()
We have constant CONFIG_CBB==0, replace ill dev_find_slot()
with safe pcidev_on_root();
Change-Id: Ieb2030fa3d77a9f49fc5faf12b92b5f00f49d354
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/26482
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index 03db042..cf7e3f8 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -98,7 +98,7 @@
static struct device *get_node_pci(u32 nodeid, u32 fn)
{
- return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
+ return pcidev_on_root(CONFIG_CDB + nodeid, fn);
}
static void get_fx_devs(void)
@@ -567,12 +567,12 @@
{
struct device *dev;
u32 value;
- dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */
+ dev = pcidev_on_root(0, 0); /* clear IoapicSbFeatureEn */
pci_write_config32(dev, 0xF8, 0);
pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */
/* disable No Snoop */
- dev = dev_find_slot(0, PCI_DEVFN(1, 1));
+ dev = pcidev_on_root(1, 1);
value = pci_read_config32(dev, 0x60);
value &= ~(1 << 11);
pci_write_config32(dev, 0x60, value);
@@ -843,7 +843,7 @@
int siblings = 0;
unsigned int family;
- dev_mc = dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB, 0));
+ dev_mc = pcidev_on_root(CONFIG_CDB, 0);
if (!dev_mc) {
printk(BIOS_ERR, "%02x:%02x.0 not found", CONFIG_CBB, CONFIG_CDB);
die("");
@@ -872,7 +872,7 @@
pbus = dev_mc->bus;
/* Find the cpu's pci device */
- cdb_dev = dev_find_slot(CONFIG_CBB, PCI_DEVFN(devn, 0));
+ cdb_dev = pcidev_on_root(devn, 0);
if (!cdb_dev) {
/* If I am probing things in a weird order
* ensure all of the cpu's pci devices are found.
@@ -882,7 +882,7 @@
cdb_dev = pci_probe_dev(NULL, pbus,
PCI_DEVFN(devn, fn));
}
- cdb_dev = dev_find_slot(CONFIG_CBB, PCI_DEVFN(devn, 0));
+ cdb_dev = pcidev_on_root(devn, 0);
} else {
/* Ok, We need to set the links for that device.
* otherwise the device under it will not be scanned
@@ -894,11 +894,11 @@
family = (family >> 20) & 0xFF;
if (family == 1) { //f10
u32 dword;
- cdb_dev = dev_find_slot(CONFIG_CBB, PCI_DEVFN(devn, 3));
+ cdb_dev = pcidev_on_root(devn, 3);
dword = pci_read_config32(cdb_dev, 0xe8);
siblings = ((dword & BIT15) >> 13) | ((dword & (BIT13 | BIT12)) >> 12);
} else if (family == 7) {//f16
- cdb_dev = dev_find_slot(CONFIG_CBB, PCI_DEVFN(devn, 5));
+ cdb_dev = pcidev_on_root(devn, 5);
if (cdb_dev && cdb_dev->enabled) {
siblings = pci_read_config32(cdb_dev, 0x84);
siblings &= 0xFF;