soc/amd/sabrina: Do not clear Port80 enable bit in ESPI Decode
This is done to work around a hang when SMU writes to port80. Remove it
after the issue is fixed.
BUG=b:224618411
TEST=Build and boot to OS in Skyrim.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: Ic152c295954d33ef1acddb3b06f0c6bbfbfb38ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63122
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig
index bef4160..3df7a4b 100644
--- a/src/soc/amd/sabrina/Kconfig
+++ b/src/soc/amd/sabrina/Kconfig
@@ -49,6 +49,7 @@
select SOC_AMD_COMMON_BLOCK_APOB # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
+ select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN # TODO: Remove(b/227201571)
select SOC_AMD_COMMON_BLOCK_GRAPHICS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_HAS_ESPI # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_I2C