soc/amd/picasso: clean up global NVS
Remove the unused fields that were previously used for PCNT and PWRS.
The LIDS field is only used in the ACPI code, but keep if for now, since
it would require a bigger rework to remove it from the global NVS.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I79509146431e4584e50af4477f3f50dc3cf01bcf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72138
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/picasso/acpi/globalnvs.asl b/src/soc/amd/picasso/acpi/globalnvs.asl
index 10a927e..f616361 100644
--- a/src/soc/amd/picasso/acpi/globalnvs.asl
+++ b/src/soc/amd/picasso/acpi/globalnvs.asl
@@ -9,13 +9,11 @@
Field (GNVS, ByteAcc, NoLock, Preserve)
{
/* Miscellaneous */
- , 8, // 0x00 - Processor Count
- LIDS, 8, // 0x01 - LID State
- , 8, // 0x02 - AC Power State
- CBMC, 32, // 0x03 - 0x06 - coreboot Memory Console
- PM1I, 64, // 0x07 - 0x0e - System Wake Source - PM1 Index
- GPEI, 64, // 0x0f - 0x16 - GPE Wake Source
- TMPS, 8, // 0x17 - Temperature Sensor ID
- TCRT, 8, // 0x18 - Critical Threshold
- TPSV, 8, // 0x19 - Passive Threshold
+ LIDS, 8, // 0x00 - LID State
+ CBMC, 32, // 0x01 - 0x04 - coreboot Memory Console
+ PM1I, 64, // 0x05 - 0x0c - System Wake Source - PM1 Index
+ GPEI, 64, // 0x0d - 0x14 - GPE Wake Source
+ TMPS, 8, // 0x15 - Temperature Sensor ID
+ TCRT, 8, // 0x16 - Critical Threshold
+ TPSV, 8, // 0x17 - Passive Threshold
}
diff --git a/src/soc/amd/picasso/include/soc/nvs.h b/src/soc/amd/picasso/include/soc/nvs.h
index 2829f7d..aef4a97 100644
--- a/src/soc/amd/picasso/include/soc/nvs.h
+++ b/src/soc/amd/picasso/include/soc/nvs.h
@@ -14,15 +14,13 @@
struct __packed global_nvs {
/* Miscellaneous */
- uint8_t unused_was_pcnt; /* 0x00 - Processor Count */
- uint8_t lids; /* 0x01 - LID State */
- uint8_t unused_was_pwrs; /* 0x02 - AC Power State */
- uint32_t cbmc; /* 0x03 - 0x06 - coreboot Memory Console */
- uint64_t pm1i; /* 0x07 - 0x0e - System Wake Source - PM1 Index */
- uint64_t gpei; /* 0x0f - 0x16 - GPE Wake Source */
- uint8_t tmps; /* 0x17 - Temperature Sensor ID */
- uint8_t tcrt; /* 0x18 - Critical Threshold */
- uint8_t tpsv; /* 0x19 - Passive Threshold */
+ uint8_t lids; /* 0x00 - LID State */
+ uint32_t cbmc; /* 0x01 - 0x04 - coreboot Memory Console */
+ uint64_t pm1i; /* 0x05 - 0x0c - System Wake Source - PM1 Index */
+ uint64_t gpei; /* 0x0d - 0x14 - GPE Wake Source */
+ uint8_t tmps; /* 0x15 - Temperature Sensor ID */
+ uint8_t tcrt; /* 0x16 - Critical Threshold */
+ uint8_t tpsv; /* 0x17 - Passive Threshold */
};
#endif /* AMD_PICASSO_NVS_H */