src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM)

EC being the TCPM decides the mux configuration after negotiating with the
port partner on the Type-C port. The APIs added here will give the
current essential mux state information for a given port.

BUG=None
BRANCH=None
TEST=Built coreboot image and verified that using this patch mux is being
set for display during boot

Change-Id: If994a459288ef31b0e6da8c6cdfd0ce3a0303981
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index 40285dc..82de088 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -1380,11 +1380,11 @@
 	return ec_image_type;
 }
 
-int google_chromeec_get_num_pd_ports(int *num_ports)
+int google_chromeec_get_num_pd_ports(unsigned int *num_ports)
 {
 	struct ec_response_charge_port_count resp = {};
 	struct chromeec_command cmd = {
-		.cmd_code = EC_CMD_CHARGE_PORT_COUNT,
+		.cmd_code = EC_CMD_USB_PD_PORTS,
 		.cmd_version = 0,
 		.cmd_data_out = &resp,
 		.cmd_size_in = 0,
@@ -1441,6 +1441,65 @@
 	return (google_chromeec_get_current_image() == EC_IMAGE_RO);
 }
 
+int google_chromeec_usb_pd_control(int port, bool *ufp, bool *dbg_acc, uint8_t *dp_mode)
+{
+	struct ec_params_usb_pd_control pd_control = {
+		.port = port,
+		.role = USB_PD_CTRL_ROLE_NO_CHANGE,
+		.mux = USB_PD_CTRL_ROLE_NO_CHANGE,
+		.swap = USB_PD_CTRL_SWAP_NONE,
+	};
+	struct ec_response_usb_pd_control_v2 resp = {};
+	struct chromeec_command cmd = {
+		.cmd_code = EC_CMD_USB_PD_CONTROL,
+		.cmd_version = 2,
+		.cmd_data_in = &pd_control,
+		.cmd_size_in = sizeof(pd_control),
+		.cmd_data_out = &resp,
+		.cmd_size_out = sizeof(resp),
+		.cmd_dev_index = 0,
+	};
+
+	if (google_chromeec_command(&cmd) < 0)
+		return -1;
+
+	*ufp = (resp.cc_state == PD_CC_DFP_ATTACHED);
+	*dbg_acc = (resp.cc_state == PD_CC_DFP_DEBUG_ACC);
+	*dp_mode = resp.dp_mode;
+
+	return 0;
+}
+
+/**
+ * Check for the current mux state in EC. Flags representing the mux state found
+ * in ec_commands.h
+ */
+int google_chromeec_usb_get_pd_mux_info(int port, uint8_t *flags)
+{
+	struct ec_params_usb_pd_mux_info req_mux = {
+		.port = port,
+	};
+	struct ec_response_usb_pd_mux_info resp_mux = {};
+	struct chromeec_command cmd = {
+		.cmd_code = EC_CMD_USB_PD_MUX_INFO,
+		.cmd_version = 0,
+		.cmd_data_in = &req_mux,
+		.cmd_size_in = sizeof(req_mux),
+		.cmd_data_out = &resp_mux,
+		.cmd_size_out = sizeof(resp_mux),
+		.cmd_dev_index = 0,
+	};
+
+	if (port < 0)
+		return -1;
+
+	if (google_chromeec_command(&cmd) < 0)
+		return -1;
+
+	*flags = resp_mux.flags;
+	return 0;
+}
+
 /**
  * Check if EC/TCPM is in an alternate mode or not.
  *
diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h
index 9d4e588..ad3768c 100644
--- a/src/ec/google/chromeec/ec.h
+++ b/src/ec/google/chromeec/ec.h
@@ -27,6 +27,15 @@
 enum ec_image google_chromeec_get_current_image(void);
 void google_chromeec_init(void);
 int google_chromeec_pd_get_amode(uint16_t svid);
+/* Check for the current mux state in EC
+ * in: int port physical port number of the type-c port
+ * out: uint8_t flags flags representing the status of the mux such as
+ *	usb capability, dp capability, cable type, etc
+ */
+int google_chromeec_usb_get_pd_mux_info(int port, uint8_t *flags);
+/* Returns data role and type of device connected */
+int google_chromeec_usb_pd_control(int port, bool *ufp, bool *dbg_acc,
+					uint8_t *dp_mode);
 int google_chromeec_wait_for_displayport(long timeout);
 
 /* Device events */
@@ -306,7 +315,7 @@
  *			of PD-capable USB ports according to the EC.
  * @return		0 on success, -1 on error
  */
-int google_chromeec_get_num_pd_ports(int *num_ports);
+int google_chromeec_get_num_pd_ports(unsigned int *num_ports);
 
 /* Structure representing the capabilities of a USB-PD port */
 struct usb_pd_port_caps {
diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c
index 8a76805..b768316 100644
--- a/src/ec/google/chromeec/ec_acpi.c
+++ b/src/ec/google/chromeec/ec_acpi.c
@@ -144,7 +144,8 @@
 static void fill_ssdt_typec_device(const struct device *dev)
 {
 	int rv;
-	int i, num_ports;
+	int i;
+	unsigned int num_ports;
 	struct device *usb2_port;
 	struct device *usb3_port;
 	struct device *usb4_port;