drivers/intel/fsp1_1,fsp2_0: Refactor logo display
Hide the detail of allocation from cbmem from the FSP.
Loading of a BMP logo file from CBFS is not tied to FSP
version and we do not need two copies of the code, move
it under lib/.
Change-Id: I909f2771af534993cf8ba99ff0acd0bbd2c78f04
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50359
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 285bedf..63394dd4 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -184,7 +184,7 @@
bool
default n
-config FSP2_0_DISPLAY_LOGO
+config BMP_LOGO
bool "Enable logo"
default n
depends on HAVE_FSP_LOGO_SUPPORT
@@ -195,7 +195,7 @@
config FSP2_0_LOGO_FILE_NAME
string "Logo file"
- depends on FSP2_0_DISPLAY_LOGO
+ depends on BMP_LOGO
default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/logo.bmp"
config FSP_COMPRESS_FSP_S_LZMA
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
index 0943080..92f6711 100644
--- a/src/drivers/intel/fsp2_0/Makefile.inc
+++ b/src/drivers/intel/fsp2_0/Makefile.inc
@@ -22,7 +22,6 @@
ramstage-$(CONFIG_DISPLAY_FSP_HEADER) += header_display.c
ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
ramstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c
-ramstage-$(CONFIG_FSP2_0_DISPLAY_LOGO) += logo.c
ramstage-y += notify.c
ramstage-y += silicon_init.c
ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
@@ -86,7 +85,7 @@
endif
# Add logo to the cbfs image
-cbfs-files-$(CONFIG_FSP2_0_DISPLAY_LOGO) += logo.bmp
+cbfs-files-$(CONFIG_BMP_LOGO) += logo.bmp
logo.bmp-file := $(call strip_quotes,$(CONFIG_FSP2_0_LOGO_FILE_NAME))
logo.bmp-type := raw
logo.bmp-compression := LZMA
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index 97e2fea..63018c5 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -59,16 +59,13 @@
uint8_t fsp_memory_mainboard_version(void);
uint8_t fsp_memory_soc_version(void);
-/* Load logo to be displayed by FSP */
-const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size);
-
/* Callback after processing FSP notify */
void platform_fsp_notify_status(enum fsp_notify_phase phase);
/* Initialize memory margin analysis settings. */
void setup_mma(FSP_M_CONFIG *memory_cfg);
/* Update the SOC specific logo param and load the logo. */
-const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd);
+void soc_load_logo(FSPS_UPD *supd);
/* Update the SOC specific memory config param for mma. */
void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg,
struct mma_config_param *mma_cfg);
diff --git a/src/drivers/intel/fsp2_0/logo.c b/src/drivers/intel/fsp2_0/logo.c
deleted file mode 100644
index 314616b..0000000
--- a/src/drivers/intel/fsp2_0/logo.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <cbfs.h>
-#include <cbmem.h>
-#include <fsp/api.h>
-
-const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size)
-{
- const struct cbmem_entry *logo_entry = NULL;
- void *logo_buffer;
-
- logo_entry = cbmem_entry_add(CBMEM_ID_FSP_LOGO, 1 * MiB);
- if (logo_entry) {
- logo_buffer = cbmem_entry_start(logo_entry);
- if (logo_buffer) {
- *logo_size = cbfs_load("logo.bmp", (void *)logo_buffer,
- 1 * MiB);
- if (*logo_size)
- *logo_ptr = (UINT32)logo_buffer;
- }
- }
- return (logo_entry);
-}
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 8572b24..270a872 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <bootsplash.h>
#include <cbfs.h>
#include <cbmem.h>
#include <commonlib/fsp.h>
@@ -81,7 +82,6 @@
FSPS_UPD *upd, *supd;
fsp_silicon_init_fn silicon_init;
uint32_t status;
- const struct cbmem_entry *logo_entry = NULL;
fsp_multi_phase_si_init_fn multi_phase_si_init;
struct fsp_multi_phase_params multi_phase_params;
struct fsp_multi_phase_get_number_of_phases_params multi_phase_get_number;
@@ -106,8 +106,8 @@
platform_fsp_silicon_init_params_cb(upd);
/* Populate logo related entries */
- if (CONFIG(FSP2_0_DISPLAY_LOGO))
- logo_entry = soc_load_logo(upd);
+ if (CONFIG(BMP_LOGO))
+ soc_load_logo(upd);
/* Call SiliconInit */
silicon_init = (void *) (uintptr_t)(hdr->image_base +
@@ -127,8 +127,8 @@
timestamp_add_now(TS_FSP_SILICON_INIT_END);
post_code(POST_FSP_SILICON_EXIT);
- if (logo_entry)
- cbmem_entry_remove(logo_entry);
+ if (CONFIG(BMP_LOGO))
+ bmp_release_logo();
fsp_debug_after_silicon_init(status);
fsps_return_value_handler(FSP_SILICON_INIT_API, status);
@@ -226,8 +226,4 @@
do_silicon_init(&fsps_hdr);
}
-/* Load bmp and set FSP parameters, fsp_load_logo can be used */
-__weak const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd)
-{
- return NULL;
-}
+__weak void soc_load_logo(FSPS_UPD *supd) { }