coreboot tables: Add SPI flash memory map windows to coreboot tables
This change adds details about the memory map windows to translate
addresses between SPI flash space and host address space to coreboot
tables. This is useful for payloads to setup the translation using the
decode windows already known to coreboot. Until now, there was a
single decode window at the top of 4G used by all x86
platforms. However, going forward, platforms might support more decode
windows and hence in order to avoid duplication in payloads this
information is filled in coreboot tables.
`lb_spi_flash()` is updated to fill in the details about these windows
by making a call to `spi_flash_get_mmap_windows()` which is
implemented by the driver providing the boot media mapping device.
BUG=b:171534504
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h
index dd739ab..5a24e14 100644
--- a/payloads/libpayload/include/sysinfo.h
+++ b/payloads/libpayload/include/sysinfo.h
@@ -40,6 +40,9 @@
/* Up to 10 MAC addresses */
#define SYSINFO_MAX_MACS 10
+/* Maximum of 2 MMAP windows for decoding SPI flash. */
+#define SYSINFO_MAX_MMAP_WINDOWS 2
+
#include <coreboot_tables.h>
/*
@@ -126,6 +129,8 @@
uint32_t size;
uint32_t sector_size;
uint32_t erase_cmd;
+ uint32_t mmap_window_count;
+ struct flash_mmap_window mmap_table[SYSINFO_MAX_MMAP_WINDOWS];
} spi_flash;
uint64_t fmap_offset;
uint64_t cbfs_offset;