commit 48d6b76d53a43c6924ed27303651aed5c6c6f34c
author Arthur Heymans <arthur@aheymans.xyz> Tue Jun 13 14:12:38 2017 +0200
committer Martin Roth <martinroth@google.com> Fri Jun 16 15:57:12 2017 +0200
tree 2e0fe4b9edcaef8b27a9eb6424c2c47973145271
parent 3038b48de36d69c26c29977d1ff8afc7953febf3

src/soc/intel/common: Don't allow user to change PCIe BAR

Change-Id: I254549057552be93611afa8ca52d22be220fe3dc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20178
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>

src/soc/intel/common/block/systemagent/Kconfig

diff --git a/src/soc/intel/common/block/systemagent/Kconfig b/src/soc/intel/common/block/systemagent/Kconfig
index 01a4f8e..2084a38 100644
--- a/src/soc/intel/common/block/systemagent/Kconfig
+++ b/src/soc/intel/common/block/systemagent/Kconfig
@@ -4,7 +4,7 @@
 	  Intel Processor common System Agent support
 
 config MMCONF_BASE_ADDRESS
-	hex "PCI MMIO Base Address"
+	hex
 	default 0xe0000000
 
 config SA_PCIEX_LENGTH