Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an
example.
This newer version reflects the recent changes to further simplify the console
code and partly gets rid of some hacks in the previous version.
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/include/uart8250.h b/src/include/uart8250.h
index 217558a..bbf2d8c 100644
--- a/src/include/uart8250.h
+++ b/src/include/uart8250.h
@@ -124,6 +124,7 @@
#define UART_MSR_DCTS 0x01 /* Delta CTS */
#define UART_SCR 0x07
+#define UART_SPR 0x07
#ifndef __ROMCC__
@@ -136,6 +137,17 @@
*/
void uart8250_init(unsigned base_port, unsigned divisor);
void uart_init(void);
+
+/* and the same for memory mapped uarts */
+unsigned char uart8250_mem_rx_byte(unsigned base_port);
+int uart8250_mem_can_rx_byte(unsigned base_port);
+void uart8250_mem_tx_byte(unsigned base_port, unsigned char data);
+void uart8250_mem_init(unsigned base_port, unsigned divisor);
+u32 uart_mem_init(void);
+
+/* and special init for OXPCIe based cards */
+void oxford_init(void);
+
#endif
#endif /* UART8250_H */