soc/intel/baytrail/acpi: Replace Store(a,b) with ASL 2.0 syntax
Replace `Store (a, b)` with `b = a`.
Change-Id: Ic171f3343bb35e43be5fdb50c5c926eede6a1d93
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
diff --git a/src/soc/intel/baytrail/acpi/dptf/charger.asl b/src/soc/intel/baytrail/acpi/dptf/charger.asl
index e7ede39..f8eac66 100644
--- a/src/soc/intel/baytrail/acpi/dptf/charger.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/charger.asl
@@ -26,7 +26,7 @@
Method (PPPC)
{
/* Convert size of PPSS table to index */
- Store (SizeOf (\_SB.CHPS), Local0)
+ Local0 = SizeOf (\_SB.CHPS)
Local0--
/* Check if charging is disabled (AC removed) */
@@ -45,8 +45,8 @@
Method (SPPC, 1)
{
/* Retrieve Control (index 4) for specified PPSS level */
- Store (DeRefOf (Index (DeRefOf (Index
- (\_SB.CHPS, ToInteger (Arg0))), 4)), Local0)
+ Local0 = DeRefOf (Index (DeRefOf (Index
+ (\_SB.CHPS, ToInteger (Arg0))), 4))
/* Pass Control value to EC to limit charging */
\_SB.PCI0.LPCB.EC0.CHGS (Local0)
diff --git a/src/soc/intel/baytrail/acpi/dptf/cpu.asl b/src/soc/intel/baytrail/acpi/dptf/cpu.asl
index cca1423..9affbea 100644
--- a/src/soc/intel/baytrail/acpi/dptf/cpu.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/cpu.asl
@@ -73,7 +73,7 @@
Method (_TDL)
{
If (CondRefOf (\_SB.CP00._TSS)) {
- Store (SizeOf (\_SB.CP00._TSS ()), Local0)
+ Local0 = SizeOf (\_SB.CP00._TSS ())
Local0--
Return (Local0)
} Else {
@@ -92,7 +92,7 @@
Method (SPPC, 1)
{
- Store (Arg0, \PPCM)
+ \PPCM = Arg0
/* Notify OS to re-read _PPC limit on each CPU */
\PPCN ()
@@ -116,7 +116,7 @@
If (CondRefOf (\_SB.MPDL)) {
Return (\_SB.MPDL)
} ElseIf (CondRefOf (\_SB.CP00._PSS)) {
- Store (SizeOf (\_SB.CP00._PSS ()), Local0)
+ Local0 = SizeOf (\_SB.CP00._PSS ())
Local0--
Return (Local0)
} Else {
diff --git a/src/soc/intel/baytrail/acpi/dptf/thermal.asl b/src/soc/intel/baytrail/acpi/dptf/thermal.asl
index 93d7928..74287d9 100644
--- a/src/soc/intel/baytrail/acpi/dptf/thermal.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/thermal.asl
@@ -6,7 +6,7 @@
#if CONFIG(EC_SUPPORTS_DPTF_TEVT)
Method (TEVT, 1, NotSerialized)
{
- Store (ToInteger (Arg0), Local0)
+ Local0 = ToInteger (Arg0)
#ifdef DPTF_TSR0_SENSOR_ID
If (Local0 == DPTF_TSR0_SENSOR_ID) {
diff --git a/src/soc/intel/baytrail/acpi/irqlinks.asl b/src/soc/intel/baytrail/acpi/irqlinks.asl
index a2f75fa..d0f3dcb 100644
--- a/src/soc/intel/baytrail/acpi/irqlinks.asl
+++ b/src/soc/intel/baytrail/acpi/irqlinks.asl
@@ -8,7 +8,7 @@
/* Disable method */
Method (_DIS, 0, Serialized)
{
- Store (0x80, PRTA)
+ PRTA = 0x80
}
/* Possible Resource Settings for this Link */
@@ -28,7 +28,7 @@
CreateWordField(RTLA, 1, IRQ0)
/* Clear the WordField */
- Store (Zero, IRQ0)
+ IRQ0 = Zero
/* Set the bit from PRTA */
ShiftLeft(1, And(PRTA, 0x0f), IRQ0)
@@ -45,7 +45,7 @@
FindSetRightBit(IRQ0, Local0)
Local0--
- Store(Local0, PRTA)
+ PRTA = Local0
}
/* Status */
@@ -67,7 +67,7 @@
/* Disable method */
Method (_DIS, 0, Serialized)
{
- Store (0x80, PRTB)
+ PRTB = 0x80
}
/* Possible Resource Settings for this Link */
@@ -87,7 +87,7 @@
CreateWordField(RTLB, 1, IRQ0)
/* Clear the WordField */
- Store (Zero, IRQ0)
+ IRQ0 = Zero
/* Set the bit from PRTB */
ShiftLeft(1, And(PRTB, 0x0f), IRQ0)
@@ -104,7 +104,7 @@
FindSetRightBit(IRQ0, Local0)
Local0--
- Store(Local0, PRTB)
+ PRTB = Local0
}
/* Status */
@@ -126,7 +126,7 @@
/* Disable method */
Method (_DIS, 0, Serialized)
{
- Store (0x80, PRTC)
+ PRTC = 0x80
}
/* Possible Resource Settings for this Link */
@@ -146,7 +146,7 @@
CreateWordField(RTLC, 1, IRQ0)
/* Clear the WordField */
- Store (Zero, IRQ0)
+ IRQ0 = Zero
/* Set the bit from PRTC */
ShiftLeft(1, And(PRTC, 0x0f), IRQ0)
@@ -163,7 +163,7 @@
FindSetRightBit(IRQ0, Local0)
Local0--
- Store(Local0, PRTC)
+ PRTC = Local0
}
/* Status */
@@ -185,7 +185,7 @@
/* Disable method */
Method (_DIS, 0, Serialized)
{
- Store (0x80, PRTD)
+ PRTD = 0x80
}
/* Possible Resource Settings for this Link */
@@ -205,7 +205,7 @@
CreateWordField(RTLD, 1, IRQ0)
/* Clear the WordField */
- Store (Zero, IRQ0)
+ IRQ0 = Zero
/* Set the bit from PRTD */
ShiftLeft(1, And(PRTD, 0x0f), IRQ0)
@@ -222,7 +222,7 @@
FindSetRightBit(IRQ0, Local0)
Local0--
- Store(Local0, PRTD)
+ PRTD = Local0
}
/* Status */
@@ -244,7 +244,7 @@
/* Disable method */
Method (_DIS, 0, Serialized)
{
- Store (0x80, PRTE)
+ PRTE = 0x80
}
/* Possible Resource Settings for this Link */
@@ -264,7 +264,7 @@
CreateWordField(RTLE, 1, IRQ0)
/* Clear the WordField */
- Store (Zero, IRQ0)
+ IRQ0 = Zero
/* Set the bit from PRTE */
ShiftLeft(1, And(PRTE, 0x0f), IRQ0)
@@ -281,7 +281,7 @@
FindSetRightBit(IRQ0, Local0)
Local0--
- Store(Local0, PRTE)
+ PRTE = Local0
}
/* Status */
@@ -303,7 +303,7 @@
/* Disable method */
Method (_DIS, 0, Serialized)
{
- Store (0x80, PRTF)
+ PRTF = 0x80
}
/* Possible Resource Settings for this Link */
@@ -323,7 +323,7 @@
CreateWordField(RTLF, 1, IRQ0)
/* Clear the WordField */
- Store (Zero, IRQ0)
+ IRQ0 = Zero
/* Set the bit from PRTF */
ShiftLeft(1, And(PRTF, 0x0f), IRQ0)
@@ -340,7 +340,7 @@
FindSetRightBit(IRQ0, Local0)
Local0--
- Store(Local0, PRTF)
+ PRTF = Local0
}
/* Status */
@@ -362,7 +362,7 @@
/* Disable method */
Method (_DIS, 0, Serialized)
{
- Store (0x80, PRTG)
+ PRTG = 0x80
}
/* Possible Resource Settings for this Link */
@@ -382,7 +382,7 @@
CreateWordField(RTLG, 1, IRQ0)
/* Clear the WordField */
- Store (Zero, IRQ0)
+ IRQ0 = Zero
/* Set the bit from PRTG */
ShiftLeft(1, And(PRTG, 0x0f), IRQ0)
@@ -399,7 +399,7 @@
FindSetRightBit(IRQ0, Local0)
Local0--
- Store(Local0, PRTG)
+ PRTG = Local0
}
/* Status */
@@ -421,7 +421,7 @@
/* Disable method */
Method (_DIS, 0, Serialized)
{
- Store (0x80, PRTH)
+ PRTH = 0x80
}
/* Possible Resource Settings for this Link */
@@ -441,7 +441,7 @@
CreateWordField(RTLH, 1, IRQ0)
/* Clear the WordField */
- Store (Zero, IRQ0)
+ IRQ0 = Zero
/* Set the bit from PRTH */
ShiftLeft(1, And(PRTH, 0x0f), IRQ0)
@@ -458,7 +458,7 @@
FindSetRightBit(IRQ0, Local0)
Local0--
- Store(Local0, PRTH)
+ PRTH = Local0
}
/* Status */
diff --git a/src/soc/intel/baytrail/acpi/lpe.asl b/src/soc/intel/baytrail/acpi/lpe.asl
index a726fcd..171134e 100644
--- a/src/soc/intel/baytrail/acpi/lpe.asl
+++ b/src/soc/intel/baytrail/acpi/lpe.asl
@@ -43,15 +43,15 @@
{
/* Update BAR0 from NVS */
CreateDwordField (^RBUF, ^BAR0._BAS, BAS0)
- Store (\LPB0, BAS0)
+ BAS0 = \LPB0
/* Update BAR1 from NVS */
CreateDwordField (^RBUF, ^BAR1._BAS, BAS1)
- Store (\LPB1, BAS1)
+ BAS1 = \LPB1
/* Update LPE FW from NVS */
CreateDwordField (^RBUF, ^BAR2._BAS, BAS2)
- Store (\LPFW, BAS2)
+ BAS2 = \LPFW
/* Append any Mainboard defined GPIOs */
If (CondRefOf (^GBUF)) {
diff --git a/src/soc/intel/baytrail/acpi/lpss.asl b/src/soc/intel/baytrail/acpi/lpss.asl
index 20feabf..997dc27 100644
--- a/src/soc/intel/baytrail/acpi/lpss.asl
+++ b/src/soc/intel/baytrail/acpi/lpss.asl
@@ -18,7 +18,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S0B0, RBAS)
+ RBAS = \S0B0
Return (^RBUF)
}
@@ -50,7 +50,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S8B0, RBAS)
+ RBAS = \S8B0
Return (^RBUF)
}
@@ -90,7 +90,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S1B0, RBAS)
+ RBAS = \S1B0
Return (^RBUF)
}
@@ -149,7 +149,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S2B0, RBAS)
+ RBAS = \S2B0
Return (^RBUF)
}
@@ -208,7 +208,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S3B0, RBAS)
+ RBAS = \S3B0
Return (^RBUF)
}
@@ -267,7 +267,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S4B0, RBAS)
+ RBAS = \S4B0
Return (^RBUF)
}
@@ -326,7 +326,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S5B0, RBAS)
+ RBAS = \S5B0
Return (^RBUF)
}
@@ -385,7 +385,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S6B0, RBAS)
+ RBAS = \S6B0
Return (^RBUF)
}
@@ -444,7 +444,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S7B0, RBAS)
+ RBAS = \S7B0
Return (^RBUF)
}
@@ -497,7 +497,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\S9B0, RBAS)
+ RBAS = \S9B0
Return (^RBUF)
}
@@ -544,7 +544,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\SAB0, RBAS)
+ RBAS = \SAB0
Return (^RBUF)
}
@@ -572,7 +572,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\SBB0, RBAS)
+ RBAS = \SBB0
Return (^RBUF)
}
@@ -606,7 +606,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\SCB0, RBAS)
+ RBAS = \SCB0
Return (^RBUF)
}
@@ -659,7 +659,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\SDB0, RBAS)
+ RBAS = \SDB0
Return (^RBUF)
}
diff --git a/src/soc/intel/baytrail/acpi/scc.asl b/src/soc/intel/baytrail/acpi/scc.asl
index 3113e2f..c5da6fe 100644
--- a/src/soc/intel/baytrail/acpi/scc.asl
+++ b/src/soc/intel/baytrail/acpi/scc.asl
@@ -19,7 +19,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\C0B0, RBAS)
+ RBAS = \C0B0
Return (^RBUF)
}
@@ -82,7 +82,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\C1B0, RBAS)
+ RBAS = \C1B0
Return (^RBUF)
}
@@ -134,7 +134,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^BAR0._BAS, RBAS)
- Store (\C2B0, RBAS)
+ RBAS = \C2B0
Return (^RBUF)
}
diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl
index 61700bc..d3b3902 100644
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -157,15 +157,15 @@
CreateDWordField (MCRS, ^LMEM._LEN, LLEN)
If (LAnd (LPFW != Zero, LPEN == One))
{
- Store (LPFW, LMIN)
- Store (0x00100000, LLEN)
+ LMIN = LPFW
+ LLEN = 0x00100000
LMAX = LMIN + LLEN - One
}
Else
{
- Store (Zero, LMIN)
- Store (Zero, LMAX)
- Store (Zero, LLEN)
+ LMIN = Zero
+ LMAX = Zero
+ LLEN = Zero
}
/* Update PCI resource area */
@@ -174,8 +174,8 @@
CreateDWordField (MCRS, ^PMEM._LEN, PLEN)
/* TOLM is BMBOUND accessible from IOSF so is saved in NVS */
- Store (\TOLM, PMIN)
- Store (CONFIG_ECAM_MMCONF_BASE_ADDRESS - 1, PMAX)
+ PMIN = \TOLM
+ PMAX = CONFIG_ECAM_MMCONF_BASE_ADDRESS - 1
PLEN = PMAX - PMIN + 1
Return (MCRS)
@@ -238,7 +238,7 @@
Method (_CRS)
{
CreateDwordField (^RBUF, ^RBAR._BAS, RBAS)
- Store (CONFIG_ECAM_MMCONF_BASE_ADDRESS + 0xD0, RBAS)
+ RBAS = CONFIG_ECAM_MMCONF_BASE_ADDRESS + 0xD0
Return (^RBUF)
}
}
diff --git a/src/soc/intel/baytrail/acpi/xhci.asl b/src/soc/intel/baytrail/acpi/xhci.asl
index bfed3c6..d3706a4 100644
--- a/src/soc/intel/baytrail/acpi/xhci.asl
+++ b/src/soc/intel/baytrail/acpi/xhci.asl
@@ -18,11 +18,11 @@
// REV: Revision 0x02 for ACPI 5.0
CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV)
- Store (0x02, REV)
+ REV = 0x02
// VISI: Port visibility to user per port
CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI)
- Store (Arg0, VISI)
+ VISI = Arg0
Return (PCKG)
}