soc/intel/denverton_ns: make use of common cbmem_top_chipset
This replaces denverton_ns's own implementation of cbmem_top_chipset and
selects the common code one.
Change-Id: Idae96aabe2807e465bb7ab0f29910757d0346ce9
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36619
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c
index cc1d696..00d5228 100644
--- a/src/soc/intel/denverton_ns/systemagent.c
+++ b/src/soc/intel/denverton_ns/systemagent.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <cbmem.h>
#include <console/console.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
@@ -209,6 +210,7 @@
unsigned long index;
struct resource *resource;
uint64_t mc_values[NUM_MAP_ENTRIES];
+ uintptr_t top_of_ram;
/* Read in the MAP registers and report their values. */
mc_read_map_entries(dev, &mc_values[0]);
@@ -246,6 +248,7 @@
* PCI_BASE_ADDRESS_0.
*/
index = 0;
+ top_of_ram = (uintptr_t)cbmem_top();
/* 0 - > 0xa0000 */
base_k = 0;
@@ -254,12 +257,12 @@
/* 0x100000 -> top_of_ram */
base_k = 0x100000 >> 10;
- size_k = (top_of_32bit_ram() >> 10) - base_k;
+ size_k = (top_of_ram >> 10) - base_k;
ram_resource(dev, index++, base_k, size_k);
/* top_of_ram -> TSEG */
resource = new_resource(dev, index++);
- resource->base = top_of_32bit_ram();
+ resource->base = top_of_ram;
resource->size = mc_values[TSEG_REG] - resource->base;
resource->flags = IORESOURCE_MEM | IORESOURCE_FIXED |
IORESOURCE_STORED | IORESOURCE_RESERVE |