commit 468d02cc82151366a2781c9af29e6737105495cb
author Martin Roth <martin@coreboot.org> Wed Oct 23 21:44:42 2019 -0600
committer Martin Roth <martinroth@google.com> Sun Oct 27 18:12:50 2019 +0000
tree de8540c053517a4da8b00ea95f24579bd9223dcd
parent 36fcc85be459ec175c7f4be08db7ae9708f01b5d

src/[northbridge,security]: change "unsigned" to "unsigned int"

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If6b5930f78c3da6dcefaa7b6202cd0424a24525b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/northbridge/intel/i440bx/debug.c

diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c
index 9518618..7df639b 100644
--- a/src/northbridge/intel/i440bx/debug.c
+++ b/src/northbridge/intel/i440bx/debug.c
@@ -21,7 +21,7 @@
 	int i;
 	printk(BIOS_DEBUG, "\n");
 	for (i = 0; i < DIMM_SOCKETS; i++) {
-		unsigned device;
+		unsigned int device;
 		device = DIMM0 + i;
 		if (device) {
 			int j;
@@ -45,7 +45,7 @@
 	}
 }
 
-void dump_pci_device(unsigned dev)
+void dump_pci_device(unsigned int dev)
 {
 	int i;
 	printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x\n", (dev >> 20) & 0xff, (dev >> 15) & 0x1f, (dev >> 12) & 7);