mb/*: Update SPD mapping for sandybridge boards
Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree.
Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping.
Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb
index 853a410..a035628 100644
--- a/src/mainboard/kontron/ktqm77/devicetree.cb
+++ b/src/mainboard/kontron/ktqm77/devicetree.cb
@@ -2,6 +2,7 @@
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
register "max_mem_clock_mhz" = "800"
register "ec_present" = "1"
diff --git a/src/mainboard/kontron/ktqm77/early_init.c b/src/mainboard/kontron/ktqm77/early_init.c
index e8fa6b1..e514f102 100644
--- a/src/mainboard/kontron/ktqm77/early_init.c
+++ b/src/mainboard/kontron/ktqm77/early_init.c
@@ -1,13 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/hpet.h>
#include <bootblock_common.h>
-#include <stdint.h>
#include <device/pnp_def.h>
#include <device/pnp_ops.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>
@@ -55,9 +52,6 @@
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
- const uint8_t spdaddr[] = {0xA0, 0x00, 0xA4, 0x00};
-
- memcpy(pei_data->spd_addresses, &spdaddr, sizeof(pei_data->spd_addresses));
}
const struct southbridge_usb_port mainboard_usb_ports[] = {
@@ -78,12 +72,6 @@
{ 1, 0, 4 }, /* P13: internal USB 2.0 (OC4) */
};
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
- read_spd(&spd[0], 0x50, id_only);
- read_spd(&spd[2], 0x52, id_only);
-}
-
void mainboard_early_init(int s3resume)
{
/* Enable PEG10 (1x16) */