diff --git a/src/cpu/intel/haswell/finalize.c b/src/cpu/intel/haswell/finalize.c
index 3bf9225..3983876 100644
--- a/src/cpu/intel/haswell/finalize.c
+++ b/src/cpu/intel/haswell/finalize.c
@@ -1,8 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <types.h>
-#include <arch/cpu.h>
 #include <cpu/x86/msr.h>
+
 #include "haswell.h"
 
 void intel_cpu_haswell_finalize_smm(void)
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 3b11e93..c745494 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <cpu/intel/haswell/haswell.h>
 #include <cpu/x86/msr.h>
diff --git a/src/cpu/intel/model_2065x/finalize.c b/src/cpu/intel/model_2065x/finalize.c
index e1fa968..6910713 100644
--- a/src/cpu/intel/model_2065x/finalize.c
+++ b/src/cpu/intel/model_2065x/finalize.c
@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <types.h>
-#include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <cpu/intel/speedstep.h>
+
 #include "model_2065x.h"
 
 /* MSR Documentation based on
diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c
index 2298684..afdb7df 100644
--- a/src/cpu/intel/model_206ax/finalize.c
+++ b/src/cpu/intel/model_206ax/finalize.c
@@ -1,8 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <types.h>
-#include <arch/cpu.h>
 #include <cpu/x86/msr.h>
+
 #include "model_206ax.h"
 
 /* MSR Documentation based on
diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c
index 8d6aae9..5a7fa57 100644
--- a/src/mainboard/intel/adlrvp/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -1,10 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/cpu.h>
-#include "board_id.h"
 #include <baseboard/variants.h>
 #include <soc/romstage.h>
 
+#include "board_id.h"
+
 static const struct mb_cfg ddr4_mem_config = {
 	.type = MEM_TYPE_DDR4,
 
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/memory.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/memory.c
index e965e6b..eedb408 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/memory.c
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/memory.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/cpu.h>
 #include <baseboard/variants.h>
 #include <intelblocks/mp_init.h>
 
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/memory.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/memory.c
index 8e7bb14..cf2c1b9 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/memory.c
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/memory.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/cpu.h>
 #include <baseboard/variants.h>
 #include <intelblocks/mp_init.h>
 
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index cef0131..2c16818 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -5,7 +5,6 @@
 #include <console/console.h>
 #include <cpu/intel/model_206ax/model_206ax.h>
 #include <string.h>
-#include <arch/cpu.h>
 #include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <northbridge/intel/sandybridge/chip.h>
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c
index 32f5ea2..6de1cb0 100644
--- a/src/soc/intel/alderlake/cpu.c
+++ b/src/soc/intel/alderlake/cpu.c
@@ -6,7 +6,6 @@
  * Chapter number: 14
  */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <device/pci.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index f60ebd8..5546f27 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -9,7 +9,6 @@
 #include <console/console.h>
 #include <types.h>
 #include <string.h>
-#include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <cpu/intel/turbo.h>
 #include <soc/acpi.h>
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index 6a4f773..8b845c0 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <device/pci.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/soc/intel/elkhartlake/cpu.c b/src/soc/intel/elkhartlake/cpu.c
index 984f7f2..6d86b0c 100644
--- a/src/soc/intel/elkhartlake/cpu.c
+++ b/src/soc/intel/elkhartlake/cpu.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <cpu/intel/smm_reloc.h>
 #include <cpu/intel/turbo.h>
diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c
index dd70c85..6c3365b 100644
--- a/src/soc/intel/icelake/cpu.c
+++ b/src/soc/intel/icelake/cpu.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <device/pci.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/soc/intel/jasperlake/cpu.c b/src/soc/intel/jasperlake/cpu.c
index a3790e1..8e54eaa 100644
--- a/src/soc/intel/jasperlake/cpu.c
+++ b/src/soc/intel/jasperlake/cpu.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <device/pci.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 6872c12..1647db4 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/soc/intel/tigerlake/cpu.c b/src/soc/intel/tigerlake/cpu.c
index 974401f..925bddb 100644
--- a/src/soc/intel/tigerlake/cpu.c
+++ b/src/soc/intel/tigerlake/cpu.c
@@ -6,7 +6,6 @@
  * Chapter number: 15
  */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <device/pci.h>
 #include <cpu/x86/lapic.h>