soc/braswell: Fix P-state table
Incorrect bus-core-ratio been used to generate P-state table
Original-Reviewed-on: https://chromium-review.googlesource.com/290681
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: I4a34ec80ff3f2ed46dc074c9f8fe06756db8b357
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/12731
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/soc/intel/braswell/tsc_freq.c b/src/soc/intel/braswell/tsc_freq.c
index 284ba2b..fff882e 100644
--- a/src/soc/intel/braswell/tsc_freq.c
+++ b/src/soc/intel/braswell/tsc_freq.c
@@ -26,12 +26,38 @@
#endif
#include <stdint.h>
+static const unsigned int cpu_bus_clk_freq_table[] = {
+ 83333,
+ 100000,
+ 133333,
+ 116666,
+ 80000,
+ 93333,
+ 90000,
+ 88900,
+ 87500
+};
+
+unsigned int cpu_bus_freq_khz(void)
+{
+ msr_t clk_info = rdmsr(MSR_BSEL_CR_OVERCLOCK_CONTROL);
+ if((clk_info.lo & 0xF) < (sizeof(cpu_bus_clk_freq_table)/sizeof(unsigned int)))
+ {
+ return(cpu_bus_clk_freq_table[clk_info.lo & 0xF]);
+ }
+ return 0;
+}
+
unsigned long tsc_freq_mhz(void)
{
- msr_t ia_core_ratios;
+ msr_t platform_info;
+ unsigned int bclk_khz = cpu_bus_freq_khz();
- ia_core_ratios = rdmsr(MSR_IACORE_RATIOS);
- return (BUS_FREQ_KHZ * ((ia_core_ratios.lo >> 16) & 0x3f)) / 1000;
+ if (!bclk_khz)
+ return 0;
+
+ platform_info = rdmsr(MSR_PLATFORM_INFO);
+ return (bclk_khz * ((platform_info.lo >> 8) & 0xff)) / 1000;
}
#if !ENV_SMM