chip northbridge/intel/haswell

	# Set panel power delays
	register "gpu_panel_power_cycle_delay_ms" = "500"
	register "gpu_panel_power_up_delay_ms" = "200"
	register "gpu_panel_power_down_delay_ms" = "50"
	register "gpu_panel_power_backlight_on_delay_ms" = "1"
	register "gpu_panel_power_backlight_off_delay_ms" = "200"

	device domain 0 on

		chip southbridge/intel/lynxpoint

			register "sata_devslp_disable" = "0x1"

			# DTLE DATA / EDGE values
			register "sata_port0_gen3_dtle" = "0x5"
			register "sata_port1_gen3_dtle" = "0x5"

			# Disable PCIe CLKOUT 2-5 and CLKOUT_XDP
			register "icc_clock_disable" = "0x013c0000"
		end
	end
end