libpayload (EHCI): correctly align PORTSC
Two structures in the USB EHCI stack were pointing
to hardware but not marked attribute((packed)) hence
leaving it to GCC to correctly align the data structures.
Next, the number of reserved bytes in hc_op_t was wrong
(but implicitly aligned to the correct values on x86)
It seems this worked fine on x86, but on ARM it was doing
the wrong thing.
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Change-Id: I94bed4850ded7d3f7bbc7ff3079c103c6054c22d
Reviewed-on: https://gerrit.chromium.org/gerrit/55555
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/4174
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
diff --git a/payloads/libpayload/drivers/usb/ehci_private.h b/payloads/libpayload/drivers/usb/ehci_private.h
index 3b9faf6..3365be1 100644
--- a/payloads/libpayload/drivers/usb/ehci_private.h
+++ b/payloads/libpayload/drivers/usb/ehci_private.h
@@ -78,10 +78,10 @@
u32 ctrldssegment;
u32 periodiclistbase;
u32 asynclistaddr;
- u8 res1[0x3f-0x1c];
+ u8 res1[0x40-0x1c];
u32 configflag;
portsc_t portsc[0];
-} hc_op_t;
+} __attribute__ ((packed)) hc_op_t;
typedef volatile struct {
#define QTD_TERMINATE 1
@@ -130,7 +130,7 @@
#define QH_PIPE_MULTIPLIER_SHIFT 30
volatile u32 current_td_ptr;
volatile qtd_t td;
-} ehci_qh_t;
+} __attribute__ ((packed)) ehci_qh_t;
typedef struct ehci {
hc_cap_t *capabilities;